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Re: [PATCH/AArch64 2/3] * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Increase to 63.


On Wed, Dec 4, 2013 at 10:29 AM, Philipp Tomsich
<philipp.tomsich@theobroma-systems.com> wrote:
> While working on various benchmarks, we've seen improvements from aligning
> function entries and hot loops to a cache-line boundary. For this reason we
> need to increase the permissible maximum code alignment to 64 bytes.

I think this should be increased to even 128 bytes as Cavium's thunder
has 128byte cache line sizes.
Also I think you should at least update this code to be closer to what
the arm code does as in
https://sourceware.org/ml/binutils/2009-06/msg00289.html .

Thanks,
Andrew

>
> Thanks,
> Philipp Tomsich.
>
>     * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Increase to 63.
>
> ---
>  gas/config/tc-aarch64.h |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
> index 74a81d6..ee60525 100644
> --- a/gas/config/tc-aarch64.h
> +++ b/gas/config/tc-aarch64.h
> @@ -116,8 +116,8 @@ void aarch64_copy_symbol_attributes (symbolS *, symbolS *);
>
>  #define TC_CONS_FIX_NEW cons_fix_new_aarch64
>
> -/* Max code alignment is 32 bytes */
> -#define MAX_MEM_FOR_RS_ALIGN_CODE 31
> +/* Max code alignment is 64 bytes */
> +#define MAX_MEM_FOR_RS_ALIGN_CODE 63
>
>  /* For frags in code sections we need to record whether they contain
>     code or data.  */
> --
> 1.7.2.5
>


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