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Re: [PATCH 1/2] bfd/elfnn-aarch64.c: Fix miscalculation of GOTPLT offset for ifunc syms.
- From: Yufeng Zhang <Yufeng dot Zhang at arm dot com>
- To: Will Newton <will dot newton at linaro dot org>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>, Patch Tracking <patches at linaro dot org>
- Date: Tue, 10 Dec 2013 16:26:44 +0000
- Subject: Re: [PATCH 1/2] bfd/elfnn-aarch64.c: Fix miscalculation of GOTPLT offset for ifunc syms.
- Authentication-results: sourceware.org; auth=none
- References: <529461A9 dot 4060909 at linaro dot org>
Hi Will,
On 11/26/13 08:54, Will Newton wrote:
[snip]
diff --git a/ld/testsuite/ld-aarch64/ifunc-21.d b/ld/testsuite/ld-aarch64/ifunc-21.d
new file mode 100644
index 0000000..fa139b2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/ifunc-21.d
@@ -0,0 +1,31 @@
+#source: ifunc-21.s
+#ld: -shared -z nocombreloc
+#objdump: -d -s -j .got.plt -j .text
+#target: aarch64*-*-*
+
+# Ensure the .got.plt slot used is correct
+
+.*: file format elf64-(little|big)aarch64
+
+Contents of section .text:
+ 02a0 .*
+Contents of section .got.plt:
+ 103a8 0+ 0+ 0+ 0+ .*
+ 103b8 0+ 0+ [0-9a-f]+ 0+ .*
+
+Disassembly of section .text:
+
+0+2a0<ifunc>:
+ 2a0: d65f03c0 ret
+
+0+2a4<bar>:
+ 2a4: 90000080 adrp x0, 10000<.*>
+ 2a8: f941e000 ldr x0, \[x0,#960\]
+ 2ac: d65f03c0 ret
This test case (and ifunc-22) fails on aarch64*-*-elf targets because of
different section starting addresses; I attached one example dump at the
end of the email. I tried to fix the test case by replacing the
hard-coded number with regexp, but I think by doing that it defeats the
original idea of checking the right .got.plt slot is used. Can you
please have a quick look at and see if the test cases can be improved to
be less sensitive to section starting addresses?
Thanks,
Yufeng
P.s. The dump I had on aarch64-none-elf:
Contents of section .text:
02f0 c0035fd6 80000090 000842f9 c0035fd6 .._.......B..._.
Contents of section .got.plt:
103f8 00000000 00000000 00000000 00000000 ................
10408 00000000 00000000 c0020000 00000000 ................
Disassembly of section .text:
00000000000002f0 <ifunc>:
2f0: d65f03c0 ret
00000000000002f4 <bar>:
2f4: 90000080 adrp x0, 10000 <bar+0xfd0c>
2f8: f9420800 ldr x0, [x0,#1040]
2fc: d65f03c0 ret