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Re: [PATCH, i386][3/3] Update to match latest AVX512 spec.


On Tue, Feb 25, 2014 at 7:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, Feb 25, 2014 at 1:41 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
>> On 24 Feb 08:30, H.J. Lu wrote:
>>> On Mon, Feb 24, 2014 at 5:22 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote:
>>> > Hi,
>>> >
>>> > Currently support version of vctps2ph with sae and only 1 register
>>>                                           ^^^^^^^^^^^^^^  Please fix
>>> commit log.  It should be vcvtps2ph.
>> Fixed.
>>> > operand. This version is encoded as if missing operand was equal to
>>> > ymm0. I didn't found any references to this variant in
>>> > http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
>>> > Attached patch removes it. Testing passes. Ok for trunk?
>>>
>>> vcvtps2ph supports memory destination.  Please add AVX512F testcases
>>> with memory destination.
>>>
>> We already have such tests. See e. g. on lines 6883-6890 in
>> gas/testsuite/gas/i386/avx512f.s we have:
>>
>>         vcvtps2ph       $0xab, %zmm6, (%ecx)     # AVX512F
>>         vcvtps2ph       $0xab, %zmm6, (%ecx){%k7}        # AVX512F
>>         vcvtps2ph       $123, %zmm6, (%ecx)      # AVX512F
>>         vcvtps2ph       $123, %zmm6, -123456(%esp,%esi,8)        # AVX512F
>>         vcvtps2ph       $123, %zmm6, 4064(%edx)  # AVX512F Disp8
>>         vcvtps2ph       $123, %zmm6, 4096(%edx)  # AVX512F
>>         vcvtps2ph       $123, %zmm6, -4096(%edx)         # AVX512F Disp8
>>
>> Do we need additional tests?
>
> Yes, please test with memory destination for:
>
> vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F,
> Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE,
> { Imm8, Imm8, RegZMM|RegMem }

Also for

vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F,
Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE,
{ Imm8, Imm8, RegZMM, RegYMM|RegMem }




-- 
H.J.


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