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Re: [PATCH, i386][3/3] Update to match latest AVX512 spec.


> >>> vcvtps2ph supports memory destination.  Please add AVX512F testcases
> >>> with memory destination.
> >>>
> >> We already have such tests. See e. g. on lines 6883-6890 in
> >> gas/testsuite/gas/i386/avx512f.s we have:
> >>
> >>         vcvtps2ph       $0xab, %zmm6, (%ecx)     # AVX512F
> >>         vcvtps2ph       $0xab, %zmm6, (%ecx){%k7}        # AVX512F
> >>         vcvtps2ph       $123, %zmm6, (%ecx)      # AVX512F
> >>         vcvtps2ph       $123, %zmm6, -123456(%esp,%esi,8)        # AVX512F
> >>         vcvtps2ph       $123, %zmm6, 4064(%edx)  # AVX512F Disp8
> >>         vcvtps2ph       $123, %zmm6, 4096(%edx)  # AVX512F
> >>         vcvtps2ph       $123, %zmm6, -4096(%edx)         # AVX512F Disp8
> >>
> >> Do we need additional tests?
> >
> > Yes, please test with memory destination for:
> >
> > vcvtps2ph, 3, 0x661D, None, 1, CpuAVX512F,
> > Modrm|EVex=1|Masking=2|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE,
> > { Imm8, Imm8, RegZMM|RegMem }
This variant is removed in my patch. What exactly should I test?
> 
> Also for
> 
> vcvtps2ph, 4, 0x661D, None, 1, CpuAVX512F,
> Modrm|EVex=1|Masking=3|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE,
> { Imm8, Imm8, RegZMM, RegYMM|RegMem }
This is reg-reg version with SAE, which is already tested on e. g.
line 2602 in gas/testsuite/gas/i386/avx512f.s:

        vcvtps2ph       $0xab, {sae}, %zmm5, %ymm6{%k7}  # AVX512F

Also instruction can't have memory operand and SAE at the same time.


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