RE: [PATCHv4] Add support for O32 FPXX ABI

[Matthew Fortune <Matthew dot Fortune at imgtec dot com>]

Richard Sandiford <rdsandiford@googlemail.com> writes:
> Matthew Fortune <Matthew.Fortune@imgtec.com> writes:
> > @@ -258,6 +258,10 @@ struct mips_set_options
> >       Changed by .set singlefloat or .set doublefloat, command-line
> options
> >       -msingle-float or -mdouble-float.  The default is false.  */
> >    bfd_boolean single_float;
> > +
> > +  /* 1 if single-precision operations on odd-numbered registers are
> > +     not allowed (even if supported by ISA_HAS_ODD_SINGLE_FPR).  */
> > +  int nooddspreg;
> >  };
> 
> I think "oddspreg" would be better, partly for consistency with the
> ISA_HAS_* macro and partly to avoid the double negative in things like:
> 
>   bfd_boolean oddspreg = (ISA_HAS_ODD_SINGLE_FPR (mips_opts.isa,
> mips_opts.arch)
> 			  || FPR_SIZE == 64)
> 			 && !mips_opts.nooddspreg;

OK. There was a reason this worked better as nooddspreg to start with but
it appears long since gone.

> > -  /* Single-precision coprocessor loads and moves are OK too.  */
> > +  /* Single-precision coprocessor loads and moves are OK for 32-bit
> registers,
> > +     otherwise it depends on oddspreg.  */
> >    if ((insn->pinfo & FP_S)
> > -      && (insn->pinfo & (INSN_COPROC_MEMORY_DELAY | INSN_STORE_MEMORY
> > -			 | INSN_LOAD_COPROC_DELAY | INSN_COPROC_MOVE_DELAY)))
> > +      && (insn->pinfo & INSN_FP_32_MOVE))
> > +    return FPR_SIZE == 32 || oddspreg;
> 
> Why do you need a new flag for this?

There are two reasons for this. The lwxc1 instruction is just an
INSN_LOAD_MEMORY. I could however just add that to the list of flags to
check (and remove INSN_COPROC_MEMORY_DELAY if the LOAD is added)... but
the bigger reason is that the micromips mtc1/mfc1 instructions are not
INSN_COPROC_MOVE_DELAY so there is no flag to detect them. This has never
been a problem before as there has always been 32 single precision
registers for micromips but now that may be restricted to 16 depending on
ABI. I could just attach a new flag to the micromips instructions which
lack any other flag but it seems clearer to attach it to the others too.
The only other option is to add INSN_COPROC_MOVE_DELAY to the mtc1/mfc1
instructions in micromips even though that is something of a lie. What do
you think is cleanest?

I would also like to get rid of all the ctc1/cfc1/cttc1/cftc1 instructions
that allow the use of floating point register names: $f0. The problem with
these is that they don't actually write floating point registers but they
will interact with the oddspreg logic as their operands have type
OP_REG_FP. Anything relying on ctc1 $0, $f[0-31] is probably expecting the
wrong thing to happen anyway. If that's OK I'll do a separate patch?

Thanks,
Matthew