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Re: [PATCHv4] Add support for O32 FPXX ABI
- From: Richard Sandiford <rdsandiford at googlemail dot com>
- To: Matthew Fortune <Matthew dot Fortune at imgtec dot com>
- Cc: "binutils\ at sourceware dot org" <binutils at sourceware dot org>, "Moore\, Catherine" <Catherine_Moore at mentor dot com>, "macro\ at codesourcery dot com" <macro at codesourcery dot com>, "Joseph Myers \(joseph\ at codesourcery dot com\)" <joseph at codesourcery dot com>
- Date: Mon, 28 Jul 2014 21:56:48 +0100
- Subject: Re: [PATCHv4] Add support for O32 FPXX ABI
- Authentication-results: sourceware.org; auth=none
- References: <6D39441BF12EF246A7ABCE6654B0235320EB4042 at LEMAIL01 dot le dot imgtec dot org> <87fvhnma8u dot fsf at talisman dot default> <6D39441BF12EF246A7ABCE6654B0235320EB4A44 at LEMAIL01 dot le dot imgtec dot org>
Matthew Fortune <Matthew.Fortune@imgtec.com> writes:
>> > - /* Single-precision coprocessor loads and moves are OK too. */
>> > + /* Single-precision coprocessor loads and moves are OK for 32-bit
>> registers,
>> > + otherwise it depends on oddspreg. */
>> > if ((insn->pinfo & FP_S)
>> > - && (insn->pinfo & (INSN_COPROC_MEMORY_DELAY | INSN_STORE_MEMORY
>> > - | INSN_LOAD_COPROC_DELAY | INSN_COPROC_MOVE_DELAY)))
>> > + && (insn->pinfo & INSN_FP_32_MOVE))
>> > + return FPR_SIZE == 32 || oddspreg;
>>
>> Why do you need a new flag for this?
>
> There are two reasons for this. The lwxc1 instruction is just an
> INSN_LOAD_MEMORY. I could however just add that to the list of flags to
> check (and remove INSN_COPROC_MEMORY_DELAY if the LOAD is added)...
Sounds good.
> but the bigger reason is that the micromips mtc1/mfc1 instructions are
> not INSN_COPROC_MOVE_DELAY so there is no flag to detect them. This
> has never been a problem before as there has always been 32 single
> precision registers for micromips but now that may be restricted to 16
> depending on ABI. I could just attach a new flag to the micromips
> instructions which lack any other flag but it seems clearer to attach
> it to the others too. The only other option is to add
> INSN_COPROC_MOVE_DELAY to the mtc1/mfc1 instructions in micromips even
> though that is something of a lie. What do you think is cleanest?
I think the last one is probably best. We could remove the _DELAY
from the name too, since the delay is only conditional anyway.
> I would also like to get rid of all the ctc1/cfc1/cttc1/cftc1 instructions
> that allow the use of floating point register names: $f0. The problem with
> these is that they don't actually write floating point registers but they
> will interact with the oddspreg logic as their operands have type
> OP_REG_FP. Anything relying on ctc1 $0, $f[0-31] is probably expecting the
> wrong thing to happen anyway. If that's OK I'll do a separate patch?
It's always dangerous to change something long-standing like that, but
I agree it's weird. OTOH "ctc1 $0, $31" could be seen as confusing too
(it isn't GPR 31).
Let's assume it's OK for now and see if there are any objections.
Thanks,
Richard