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Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: "H.J. Lu" <hjl dot tools at gmail dot com>
- Cc: "Binutils" <binutils at sourceware dot org>
- Date: Tue, 12 May 2015 15:59:48 +0100
- Subject: Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Authentication-results: sourceware.org; auth=none
- References: <20150511212331 dot GA1838 at intel dot com> <5551F4E70200007800079575 at mail dot emea dot novell dot com> <CAMe9rOpDbkeFbmNbQh0a1AKhAQy-cH4HJu20o_ERQaoR6sTxbQ at mail dot gmail dot com> <55520C440200007800079718 at mail dot emea dot novell dot com> <CAMe9rOpFgSyJm-oceuDkrBYnBQGv01ywCc43WySqX21NTJYi4Q at mail dot gmail dot com> <555216370200007800079773 at mail dot emea dot novell dot com> <CAMe9rOpOx=SSUZnCFimn4fBzFqNRDch8QYLn3Os_y7EfQH65Qw at mail dot gmail dot com>
>>> On 12.05.15 at 15:37, <hjl.tools@gmail.com> wrote:
> On Tue, May 12, 2015 at 6:03 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>> On 12.05.15 at 14:37, <hjl.tools@gmail.com> wrote:
>>> On Tue, May 12, 2015 at 5:20 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>>> On 12.05.15 at 13:54, <hjl.tools@gmail.com> wrote:
>>>>> On Tue, May 12, 2015 at 3:41 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>>>>> On 11.05.15 at 23:23, <hongjiu.lu@intel.com> wrote:
>>>>>>> Disp16 and Disp32 aren't supported by direct branches in 64-bit mode.
>>>>>>> This patch removes them from 64-bit direct branches.
>>>>>>
>>>>>> See the recent discussion regarding callw - these can certainly have
>>>>>> 16-bit displacements on AMD CPUs. And while disassembly may just
>>>>>> get "disturbed" by getting this wrong, assembly will produce bad
>>>>>> code if you don't account for both cases (or refuse to assemble
>>>>>> such mnemonics if they would require size overrides to be added).
>>>>>>
>>>>>> Apart from that I wonder why you do this for CALL and JMP, but not
>>>>>> for Jcc, JCXZ, JRCXZ, LOOP, and LOOPcc.
>>>>>>
>>>>>> But first of all - please don't bias x86 binutils towards only supporting
>>>>>> Intel hardware.
>>>>>
>>>>> Can you generate call/jmp with 16-bit displacement in 64-bit mode?
>>>>
>>>> Didn't check whether there is a mechanism currently; of course I
>>>> would expect "data16 jmp <label>" to do precisely that.
>>>
>>> Does my change generate different binary now?
>>
>> I suppose so (but I don't have the time to check right now). What
>> I did check is that what I suggested above indeed works with 2.25,
>> including the creation of 16-bit PC-relative relocations.
>>
>> Jan
>>
>
> This is what I got now:
>
> [hjl@gnu-6 tmp]$ cat x.s
> .text
> data16 jmp foo
> bar:
> mov %eax,%edx
> [hjl@gnu-6 tmp]$ gcc -c x.s
> [hjl@gnu-6 tmp]$ objdump -dwr x.o
>
> x.o: file format elf64-x86-64
>
>
> Disassembly of section .text:
>
> 0000000000000000 <bar-0x4>:
> 0: 66 e9 00 00 89 c2 data16 jmpq ffffffffc2890006
> <bar+0xffffffffc2890002> 2: R_X86_64_PC16 foo-0x2
>
> 0000000000000004 <bar>:
> 4: 89 c2 mov %eax,%edx
> [hjl@gnu-6 tmp]$
>
> Is that the same as what you got with binutils 2.25?
Yes. But then what was the point of you ripping out Disp16?
Jan