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[AArch64][ld-testsuite] Select correct linker emulation for ILP32 according to endianess


As reported by James Greenhalgh, the new added ILP32 relocation tests
failed on big-endian mode.

It's because we have choosen wrong linker emulation mode for big-endian
ILP32.

This patch add a new helper function to select correct emulation mode
for ILP32/big mode.

It can be reused in other ILP32 relocation types testcases though
emit-relocs-28 is the only ILP32 test currently.

We also need to relax the expected result, as the start address of
exec file is different for elf and linux configuration.

OK for trunk?

2015-06-17  Jiong Wang  <jiong.wang@arm.com>

ld/testsuite/
  * ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul): New
  function.
  * ld-aarch64/emit-relocs-28.d: Use aarch64_choose_ilp32_emul to choose
  emulation mode.
  
-- 
Regards,
Jiong

diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index 021343b..531ec0e 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -45,6 +45,14 @@ set aarch64elftests {
      "erratum835769"}
 }
 
+proc aarch64_choose_ilp32_emul {} {
+    if [istarget aarch64_be*-*-*] then {
+        return "aarch64elf32b"
+    } else {
+        return "aarch64linux32"
+    }
+}
+
 run_ld_link_tests $aarch64elftests
 run_dump_test "erratum843419"
 
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-28.d b/ld/testsuite/ld-aarch64/emit-relocs-28.d
index f138fb1..24424b9 100644
--- a/ld/testsuite/ld-aarch64/emit-relocs-28.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-28.d
@@ -1,6 +1,6 @@
 #source: emit-relocs-28.s
 #as: -mabi=ilp32
-#ld: -m aarch64linux32 --defsym globala=0x11000 --defsym globalb=0x45000 --defsym globalc=0x1234  -e0 --emit-relocs
+#ld: -m [aarch64_choose_ilp32_emul] --defsym globala=0x11000 --defsym globalb=0x45000 --defsym globalc=0x1234  -e0 --emit-relocs
 #objdump: -dr
 
 .*: +file format .*
@@ -8,12 +8,12 @@
 
 Disassembly of section .text:
 
-00400074 <\.text>:
-  400074:	90000082 	adrp	x2, 410000 <globalb\+0x3cb000>
-			400074: R_AARCH64_P32_ADR_PREL_PG_HI21	_GLOBAL_OFFSET_TABLE_
-  400078:	f9408c40 	ldr	x0, \[x2,#280\]
-			400078: R_AARCH64_P32_LD32_GOTPAGE_LO14	globala
-  40007c:	f9409040 	ldr	x0, \[x2,#288\]
-			40007c: R_AARCH64_P32_LD32_GOTPAGE_LO14	globalb
-  400080:	f9408840 	ldr	x0, \[x2,#272\]
-			400080: R_AARCH64_P32_LD32_GOTPAGE_LO14	globalc
+.* <\.text>:
+  .*:	.* 	adrp	x2, .* <.*>
+			.*: R_AARCH64_P32_ADR_PREL_PG_HI21	_GLOBAL_OFFSET_TABLE_
+  .*:	.* 	ldr	x0, \[x2,#.*\]
+			.*: R_AARCH64_P32_LD32_GOTPAGE_LO14	globala
+  .*:	.* 	ldr	x0, \[x2,#.*\]
+			.*: R_AARCH64_P32_LD32_GOTPAGE_LO14	globalb
+  .*:	.* 	ldr	x0, \[x2,#.*\]
+			.*: R_AARCH64_P32_LD32_GOTPAGE_LO14	globalc

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