[PR19620][GAS][AARCH64]Remove mov[z,k,n] relocation symbol name restriction.

[Renlin Li <renlin dot li at foss dot arm dot com>]

Hi all,

In AArch64 gas, register name or string starts with valid register name
is not allowed as symbol name for mov[z,k,n] instruction.

For example, the following instruction is illegal according to current
implementation. Because 'x2' is viewed as a register.

movk x2, #:abs_g0_nc: x2.22
movk x2, #:abs_g0_nc: x2

The same restriction applies to any w/x register and sp/wzr/xzr register.
 
However, this is possible in real world. I came across this when compiling a
gcc test case: testsuite/gcc.dg/trampoline-1.c
This test case generates function name such as "x2.22".

On the other hand, this restriction isn't constantly applied.
It's allowed in add instruction with relocation.
The following instruction is legal.

add x2, x1, #:lo12: x2.22

There is line of a comment in related parsing function saying
"Avoid parsing a register as a general symbol"

gnu as documentation about symbol name doesn't mention this kind of
restriction. Is there any particular reasons I have missed?


The patch here is to remove this restriction on symbol name for mov[z,n,k]
instruction. A test case is also added.
Passes binutils regression. Ok to for trunk and backport to 2.26?

Regards,
Renlin Li

gas/ChangeLog:

2016-02-12  Renlin Li  <renlin.li@arm.com>
	PR gas/19620
	* config/tc-aarch64.c (parse_half): Remove restrictions on symbol
	name.
	* testsuite/gas/aarch64/movw_label.d: New.
	* testsuite/gas/aarch64/movw_label.s: New.

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index bea9429f56b805df2cd57fa2a8124634f1efc90d..3bd1838dc8308d3dda77d3c518befe84a175646e 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3473,10 +3473,8 @@ parse_address_reloc (char **str, aarch64_opnd_info *operand)
 static bfd_boolean
 parse_half (char **str, int *internal_fixup_p)
 {
-  char *p, *saved;
-  int dummy;
+  char *p = *str;
 
-  p = *str;
   skip_past_char (&p, '#');
 
   gas_assert (internal_fixup_p);
@@ -3506,12 +3504,6 @@ parse_half (char **str, int *internal_fixup_p)
   else
     *internal_fixup_p = 1;
 
-  /* Avoid parsing a register as a general symbol.  */
-  saved = p;
-  if (aarch64_reg_parse_32_64 (&p, 0, 0, &dummy, &dummy) != PARSE_FAIL)
-    return FALSE;
-  p = saved;
-
   if (! my_get_expression (&inst.reloc.exp, &p, GE_NO_PREFIX, 1))
     return FALSE;
 
diff --git a/gas/testsuite/gas/aarch64/movw_label.d b/gas/testsuite/gas/aarch64/movw_label.d
new file mode 100644
index 0000000000000000000000000000000000000000..78ef63f3fd0a3c2580fec4d03ead19351eb789f7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/movw_label.d
@@ -0,0 +1,22 @@
+#objdump: -dr
+#name: movw relocation symbol name
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f2800002 	movk	x2, #0x0
+			0: R_AARCH64_MOVW_UABS_G0_NC	x3.22
+   4:	f2800002 	movk	x2, #0x0
+			4: R_AARCH64_MOVW_UABS_G0_NC	x8
+   8:	f2800002 	movk	x2, #0x0
+			8: R_AARCH64_MOVW_UABS_G0_NC	w3
+   c:	f2800002 	movk	x2, #0x0
+			c: R_AARCH64_MOVW_UABS_G0_NC	w8.22
+  10:	f2800002 	movk	x2, #0x0
+			10: R_AARCH64_MOVW_UABS_G0_NC	sp
+  14:	f2800002 	movk	x2, #0x0
+			14: R_AARCH64_MOVW_UABS_G0_NC	wzr
+  18:	f2800002 	movk	x2, #0x0
+			18: R_AARCH64_MOVW_UABS_G0_NC	xzr
diff --git a/gas/testsuite/gas/aarch64/movw_label.s b/gas/testsuite/gas/aarch64/movw_label.s
new file mode 100644
index 0000000000000000000000000000000000000000..6e7bae5d7557d0599855730f25e87bdaebf3c886
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/movw_label.s
@@ -0,0 +1,10 @@
+	.text
+	movk x2, #:abs_g0_nc: x3.22
+	movk x2, #:abs_g0_nc: x8
+
+	movk x2, #:abs_g0_nc: w3
+	movk x2, #:abs_g0_nc: w8.22
+
+	movk x2, #:abs_g0_nc: sp
+	movk x2, #:abs_g0_nc: wzr
+	movk x2, #:abs_g0_nc: xzr