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[PATCH] add more extern C
- From: tbsaunde+binutils at tbsaunde dot org
- To: binutils at sourceware dot org
- Cc: Trevor Saunders <tbsaunde+binutils at tbsaunde dot org>
- Date: Tue, 31 May 2016 07:41:07 -0400
- Subject: [PATCH] add more extern C
- Authentication-results: sourceware.org; auth=none
From: Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
Hi,
built crosses to d10v-elf, d30v-elf, hppa-linux-gnu, ia64-elf, mips-elf,
nds32be-elf, ppc-elf, sh-elf, sparc-elf, tic6x-elf, and v850-elf, ok?
Thanks!
Trev
opcodes/ChangeLog:
2016-05-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* nds32-asm.h: Add extern "C".
* sh-opc.h: Likewise.
bfd/ChangeLog:
2016-05-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* elf32-hppa.h: Add extern "C".
* elf32-nds32.h: Likewise.
* elf32-tic6x.h: Likewise.
include/ChangeLog:
2016-05-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* elf/mips.h: Likewise.
* elf/sh.h: Likewise.
* opcode/d10v.h: Likewise.
* opcode/d30v.h: Likewise.
* opcode/ia64.h: Likewise.
* opcode/mips.h: Likewise.
* opcode/ppc.h: Likewise.
* opcode/sparc.h: Likewise.
* opcode/tic6x.h: Likewise.
* opcode/v850.h: Likewise.
---
bfd/elf32-hppa.h | 8 ++++++++
bfd/elf32-nds32.h | 9 +++++++++
bfd/elf32-tic6x.h | 8 ++++++++
include/elf/mips.h | 8 ++++++++
include/elf/sh.h | 8 ++++++++
include/opcode/d10v.h | 8 ++++++++
include/opcode/d30v.h | 8 ++++++++
include/opcode/ia64.h | 7 +++++++
include/opcode/mips.h | 8 ++++++++
include/opcode/ppc.h | 8 ++++++++
include/opcode/sparc.h | 7 +++++++
include/opcode/tic6x.h | 8 ++++++++
include/opcode/v850.h | 8 ++++++++
opcodes/nds32-asm.h | 8 ++++++++
opcodes/sh-opc.h | 8 ++++++++
15 files changed, 119 insertions(+)
diff --git a/bfd/elf32-hppa.h b/bfd/elf32-hppa.h
index ad5cb18..972d749 100644
--- a/bfd/elf32-hppa.h
+++ b/bfd/elf32-hppa.h
@@ -36,6 +36,10 @@
#include "libhppa.h"
#include "elf/hppa.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
void elf32_hppa_init_stub_bfd
(bfd *, struct bfd_link_info *);
@@ -77,4 +81,8 @@ extern elf_hppa_reloc_type ** _bfd_elf32_hppa_gen_reloc_type
#define R_HPPA_ABS_CALL R_PARISC_DIR17F
#define R_HPPA_COMPLEX R_PARISC_UNIMPLEMENTED
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _ELF32_HPPA_H */
diff --git a/bfd/elf32-nds32.h b/bfd/elf32-nds32.h
index c28617f..8227827 100644
--- a/bfd/elf32-nds32.h
+++ b/bfd/elf32-nds32.h
@@ -22,6 +22,10 @@
#ifndef ELF32_NDS32_H
#define ELF32_NDS32_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Relocation flags encoded in r_addend. */
/* Relocation flags for R_NDS32_ERLAX_ENTRY. */
@@ -152,4 +156,9 @@ struct elf_nds32_link_hash_table
bfd_boolean ex9_loop_aware; /* Ignore ex9 if inside a loop. */
bfd_boolean ifc_loop_aware; /* Ignore ifc if inside a loop. */
};
+
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/bfd/elf32-tic6x.h b/bfd/elf32-tic6x.h
index 80646c6..34d94a1 100644
--- a/bfd/elf32-tic6x.h
+++ b/bfd/elf32-tic6x.h
@@ -18,6 +18,10 @@
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
extern int elf32_tic6x_merge_arch_attributes (int, int);
/* This function is provided for use from the assembler. */
@@ -32,3 +36,7 @@ struct elf32_tic6x_params
extern void elf32_tic6x_setup (struct bfd_link_info *,
struct elf32_tic6x_params *);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/include/elf/mips.h b/include/elf/mips.h
index 70ea43e..d6fd808 100644
--- a/include/elf/mips.h
+++ b/include/elf/mips.h
@@ -30,6 +30,10 @@
#include "elf/reloc-macros.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Relocation types. */
START_RELOC_NUMBERS (elf_mips_reloc_type)
RELOC_NUMBER (R_MIPS_NONE, 0)
@@ -1312,4 +1316,8 @@ enum
Val_GNU_MIPS_ABI_MSA_128 = 1,
};
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _ELF_MIPS_H */
diff --git a/include/elf/sh.h b/include/elf/sh.h
index 9f425b2..2bc83f0 100644
--- a/include/elf/sh.h
+++ b/include/elf/sh.h
@@ -20,6 +20,10 @@
#ifndef _ELF_SH_H
#define _ELF_SH_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Processor specific flags for the ELF header e_flags field. */
#define EF_SH_MACH_MASK 0x1f
@@ -246,4 +250,8 @@ START_RELOC_NUMBERS (elf_sh_reloc_type)
RELOC_NUMBER (R_SH_64_PCREL, 255)
END_RELOC_NUMBERS (R_SH_max)
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/include/opcode/d10v.h b/include/opcode/d10v.h
index 95aaf88..a468e58 100644
--- a/include/opcode/d10v.h
+++ b/include/opcode/d10v.h
@@ -22,6 +22,10 @@
#ifndef D10V_H
#define D10V_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Format Specifier */
#define FM00 0
#define FM01 0x40000000
@@ -205,4 +209,8 @@ int d10v_reg_name_cnt (void);
/* by setting high bits to indicate type */
#define REGISTER_MASK 0xFF
+#ifdef __cplusplus
+}
+#endif
+
#endif /* D10V_H */
diff --git a/include/opcode/d30v.h b/include/opcode/d30v.h
index 48aa1f1..910d155 100644
--- a/include/opcode/d30v.h
+++ b/include/opcode/d30v.h
@@ -22,6 +22,10 @@
#ifndef D30V_H
#define D30V_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
#define NOP 0x00F00000
/* Structure to hold information about predefined registers. */
@@ -284,4 +288,8 @@ struct d30v_insn
/* by setting high bits to indicate type */
#define REGISTER_MASK 0xFF
+#ifdef __cplusplus
+}
+#endif
+
#endif /* D30V_H */
diff --git a/include/opcode/ia64.h b/include/opcode/ia64.h
index 0995995..2463f5a 100644
--- a/include/opcode/ia64.h
+++ b/include/opcode/ia64.h
@@ -25,6 +25,9 @@
#include "bfd.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
typedef BFD_HOST_U_64_BIT ia64_insn;
@@ -418,4 +421,8 @@ extern const struct ia64_dependency *ia64_find_dependency (int);
in bfd/cpu-ia64-opc.c: */
extern const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT];
+#ifdef __cplusplus
+}
+#endif
+
#endif /* opcode_ia64_h */
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 0af3ed5..b1d4ef6 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -25,6 +25,10 @@
#include "bfd.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* These are bit masks and shift counts to use to access the various
fields of an instruction. To retrieve the X field of an
instruction, use the expression
@@ -2284,4 +2288,8 @@ extern const int bfd_micromips_num_opcodes;
Used to implement -mfix-loongson2f. */
#define LOONGSON2F_NOP_INSN 0x00200825
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _MIPS_H_ */
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index df985eb..628a7a1 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -24,6 +24,10 @@
#include "bfd_stdint.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
typedef uint64_t ppc_cpu_t;
/* The opcode table is an array of struct powerpc_opcode. */
@@ -437,4 +441,8 @@ ppc_optional_operand_value (const struct powerpc_operand *operand)
return 0;
}
+#ifdef __cplusplus
+}
+#endif
+
#endif /* PPC_H */
diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h
index 6eaa8ba..ff88092 100644
--- a/include/opcode/sparc.h
+++ b/include/opcode/sparc.h
@@ -21,6 +21,10 @@
#include "ansidecl.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* The SPARC opcode table (and other related data) is defined in
the opcodes library in sparc-opc.c. If you change anything here, make
sure you fix up that file, and vice versa. */
@@ -295,3 +299,6 @@ extern const char *sparc_decode_sparclet_cpreg (int);
comment-column: 0
End: */
+#ifdef __cplusplus
+}
+#endif
diff --git a/include/opcode/tic6x.h b/include/opcode/tic6x.h
index a45871a..3a9a63a 100644
--- a/include/opcode/tic6x.h
+++ b/include/opcode/tic6x.h
@@ -22,6 +22,10 @@
#include "bfd.h"
#include "symcat.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* A field in an instruction format. The names are based on those
used in the architecture manuals. */
typedef enum
@@ -715,4 +719,8 @@ typedef struct
bfd_boolean p_bits[14];
} tic6x_fetch_packet_header;
+#ifdef __cplusplus
+}
+#endif
+
#endif /* OPCODE_TIC6X_H */
diff --git a/include/opcode/v850.h b/include/opcode/v850.h
index 4f0c0d3..5e317da 100644
--- a/include/opcode/v850.h
+++ b/include/opcode/v850.h
@@ -22,6 +22,10 @@
#ifndef V850_H
#define V850_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* The opcode table is an array of struct v850_opcode. */
struct v850_opcode
@@ -237,4 +241,8 @@ extern const struct v850_operand v850_operands[];
extern int v850_msg_is_out_of_range (const char *);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* V850_H */
diff --git a/opcodes/nds32-asm.h b/opcodes/nds32-asm.h
index f273f2f..a39a50a 100644
--- a/opcodes/nds32-asm.h
+++ b/opcodes/nds32-asm.h
@@ -23,6 +23,10 @@
#ifndef NDS32_ASM_H
#define NDS32_ASM_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/* Constant values for assembler. */
enum
{
@@ -294,4 +298,8 @@ extern void nds32_asm_init (nds32_asm_desc_t *, int);
#define FPU_MEMBI(sub) (OP6 (COP) | N32_FPU_ ## sub | 0x1 << 7)
#define AUDIO(sub) (OP6 (AEXT) | (N32_AEXT_ ## sub << 20))
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/opcodes/sh-opc.h b/opcodes/sh-opc.h
index b2bbbfd..015767a 100644
--- a/opcodes/sh-opc.h
+++ b/opcodes/sh-opc.h
@@ -20,6 +20,10 @@
#include "bfd.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
typedef enum
{
HEX_0,
@@ -1197,4 +1201,8 @@ const sh_opcode_info sh_table[] =
{ 0, {0}, {0}, 0 }
};
+#ifdef __cplusplus
+}
+#endif
+
#endif
--
2.7.4