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[PATCH 4/4] [ARC] Implement NPS-400 PMU Instructions


gas/ChangeLog:

        * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests.
        * testsuite/gas/arc/nps400-8.d: Add expected PMU
        instruction output.

include/ChangeLog:

        * opcode/arc.h: Add PMU to insn_class_t enum.

opcodes/ChangeLog:

        * arc-nps-400-tbl.h: Add NPS-400 PMU instructions to opcode table.
        * arc-opc.c: Add NPS_PMU_NXT_DST and NPS_PMU_NUM_JOB operands,
        insert_nps_pmu_num_job and extract_nps_pmu_num_job functions.
---
 gas/ChangeLog                    |  5 +++++
 gas/testsuite/gas/arc/nps400-8.d | 19 +++++++++++++++++++
 gas/testsuite/gas/arc/nps400-8.s | 33 +++++++++++++++++++++++++++++++++
 include/ChangeLog                |  4 ++++
 include/opcode/arc.h             |  1 +
 opcodes/ChangeLog                |  6 ++++++
 opcodes/arc-nps400-tbl.h         | 31 +++++++++++++++++++++++++++++++
 opcodes/arc-opc.c                |  7 +++++++
 8 files changed, 106 insertions(+)

diff --git a/gas/testsuite/gas/arc/nps400-8.d b/gas/testsuite/gas/arc/nps400-8.d
index f93fd58..9f5344c 100644
--- a/gas/testsuite/gas/arc/nps400-8.d
+++ b/gas/testsuite/gas/arc/nps400-8.d
@@ -50,3 +50,22 @@ Disassembly of section .text:
   c0:	3b0d 0f82 ffff ffff 	efabgt	r2,r3,0xffffffff
   c8:	380d 0000           	efabgt	r0,r0,r0
   cc:	380d 1247           	efabgt	r7,r8,r9
+  d0:	3e2f 7020           	jobget	0,\[cjid:r0\]
+  d4:	3e2f 71a0           	jobget	0,\[cjid:r6\]
+  d8:	3e2f 7021           	jobget.cl	0,\[cjid:r0\]
+  dc:	3e2f 71a1           	jobget.cl	0,\[cjid:r6\]
+  e0:	3812 003e           	jobdn	0,\[cjid:r0\],r0,r0
+  e4:	3a12 013e           	jobdn	0,\[cjid:r2\],r2,r4
+  e8:	3852 003e           	jobdn	0,\[cjid:r0\],r0,0
+  ec:	3a52 03fe           	jobdn	0,\[cjid:r2\],r2,0xf
+  f0:	381f 0000           	jobalc	r0,\[cm:r0\],r0,r0
+  f4:	3a1f 00c1           	jobalc	r1,\[cm:r2\],r2,r3
+  f8:	385f 0840           	jobalc	r0,\[cm:r0\],r0,0x1
+  fc:	3a5f 0801           	jobalc	r1,\[cm:r2\],r2,0x4
+ 100:	385f 0040           	sjobalc	r0,r0
+ 104:	3d5f 0046           	sjobalc	r6,r5
+ 108:	381a 0000           	jobbgt	r0,r0,r0
+ 10c:	3d1a 0182           	jobbgt	r2,r5,r6
+ 110:	3e6f 70ff           	cnljob	0
+ 114:	386f 0028           	qseq	r0,\[r0\]
+ 118:	3a6f 0128           	qseq	r2,\[r4\]
diff --git a/gas/testsuite/gas/arc/nps400-8.s b/gas/testsuite/gas/arc/nps400-8.s
index ad665fd..1042183 100644
--- a/gas/testsuite/gas/arc/nps400-8.s
+++ b/gas/testsuite/gas/arc/nps400-8.s
@@ -57,3 +57,36 @@
         efabgt r2,r3,0xffffffff
         efabgt r0,r0,r0
         efabgt r7,r8,r9
+
+        ;; jobget
+        jobget 0,[cjid:r0]
+        jobget 0,[cjid:r6]
+        jobget.cl 0,[cjid:r0]
+        jobget.cl 0,[cjid:r6]
+
+        ;; jobdn
+        jobdn 0,[cjid:r0],r0,r0
+        jobdn 0,[cjid:r2],r2,r4
+        jobdn 0,[cjid:r0],r0,0
+        jobdn 0,[cjid:r2],r2,15
+
+        ;; jobalc / sjobalc
+        jobalc r0,[cm:r0],r0,r0
+        jobalc r1,[cm:r2],r2,r3
+        jobalc r0,[cm:r0],r0,1
+        jobalc r1,[cm:r2],r2,4
+        sjobalc r0,r0
+        sjobalc r6,r5
+
+        ;; jobbgt
+
+        jobbgt r0,r0,r0
+        jobbgt r2,r5,r6
+
+        ;; cnljob
+
+        cnljob 0
+
+        ;; qseq
+        qseq r0,[r0]
+        qseq r2,[r4]
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index f5f3331..313fcc1 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -55,6 +55,7 @@ typedef enum
     LOGICAL,
     MEMORY,
     NET,
+    PMU
   } insn_class_t;
 
 /* Instruction Subclass.  */
diff --git a/opcodes/arc-nps400-tbl.h b/opcodes/arc-nps400-tbl.h
index 4fc337e..4ac038c 100644
--- a/opcodes/arc-nps400-tbl.h
+++ b/opcodes/arc-nps400-tbl.h
@@ -617,3 +617,34 @@ XLDST_LIKE("xst", 0xe)
 
 /* efabgt dst, src1, src2 */
 { "efabgt", 0x380d0000, 0xf8ff8000, ARC_OPCODE_ARC700, BMU, NPS400, { RA, RB, RC }, { 0 }},
+
+/* PMU Instructions. */
+
+/* jobget<.cl> 0, [cjid:src1] */
+{ "jobget", 0x3e2f7020, 0xfffff03f, ARC_OPCODE_ARC700, PMU, NPS400, { ZA, BRAKET, NPS_CJID, COLON, RC, BRAKET }, { 0 }},
+
+{ "jobget", 0x3e2f7021, 0xfffff03f, ARC_OPCODE_ARC700, PMU, NPS400, { ZA, BRAKET, NPS_CJID, COLON, RC, BRAKET }, { C_NPS_CL }},
+
+/* jobdn 0, [cjid:src1], src1, src2 */
+{ "jobdn", 0x3812003e, 0xf8ff803f, ARC_OPCODE_ARC700, PMU, NPS400, { ZA, BRAKET, NPS_CJID, COLON, RB, BRAKETdup, RBdup, RC }, { 0 }},
+
+/* jobdn 0, [cjid:src1], src1, nxt_dst */
+{ "jobdn", 0x3852003e, 0xf8ff803f, ARC_OPCODE_ARC700, PMU, NPS400, { ZA, BRAKET, NPS_CJID, COLON, RB, BRAKETdup, RBdup, NPS_PMU_NXT_DST }, { 0 }},
+
+/* sjobalc dst, src1 */
+{ "sjobalc", 0x385f0040, 0xf8ff8fc0, ARC_OPCODE_ARC700, PMU, NPS400, { RA, RB }, { 0 }},
+
+/* jobalc dst, [cm:src1], src1, num_job */
+{ "jobalc", 0x385f0800, 0xf8ff8800, ARC_OPCODE_ARC700, PMU, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, NPS_PMU_NUM_JOB }, { 0 }},
+
+/* jobalc dst, [cm:src1], src1, src2 */
+{ "jobalc", 0x381f0000, 0xf8ff8000, ARC_OPCODE_ARC700, PMU, NPS400, { RA, BRAKET, NPS_CM, COLON, RB, BRAKETdup, RBdup, RC }, { 0 }},
+
+/* jobbgt dst, src1, src2 */
+{ "jobbgt", 0x381a0000, 0xf8ff0000, ARC_OPCODE_ARC700, PMU, NPS400, { RA, RB, RC }, { 0 }},
+
+/* cnljob 0 */
+{ "cnljob", 0x3e6f70ff, 0xffffffff, ARC_OPCODE_ARC700, PMU, NPS400, { ZA }, { 0 }},
+
+/* qseq dst, [src1] */
+{ "qseq", 0x386f0028, 0xf8ff803f, ARC_OPCODE_ARC700, PMU, NPS400, { RB, BRAKET, RC, BRAKETdup }, { 0 }},
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index beba028..ea4209c 100644
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -1139,6 +1139,7 @@ MAKE_1BASED_INSERT_EXTRACT_FUNCS(shift_factor, 9, 8, 3)
 MAKE_1BASED_INSERT_EXTRACT_FUNCS(bits_to_scramble, 12, 8, 3)
 MAKE_1BASED_INSERT_EXTRACT_FUNCS(bdlen_max_len, 5, 256, 8)
 MAKE_1BASED_INSERT_EXTRACT_FUNCS(bd_num_buff, 6, 8, 3)
+MAKE_1BASED_INSERT_EXTRACT_FUNCS(pmu_num_job, 6, 4, 2)
 
 static unsigned
 insert_nps_min_hofs (unsigned insn ATTRIBUTE_UNUSED,
@@ -2175,6 +2176,12 @@ const struct arc_operand arc_operands[] =
 
 #define NPS_BMU_NUM     (NPS_BD_TYPE + 1)
   { 3, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_bd_num_buff, extract_nps_bd_num_buff },
+
+#define NPS_PMU_NXT_DST     (NPS_BMU_NUM + 1)
+  { 4, 6, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_PMU_NUM_JOB     (NPS_PMU_NXT_DST + 1)
+  { 2, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_pmu_num_job, extract_nps_pmu_num_job },
 };
 
 const unsigned arc_num_operands = ARRAY_SIZE (arc_operands);
-- 
2.7.4


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