This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
Re: [AArch64][SVE 31/32] Add SVE instructions
On 23/08/16 10:29, Richard Sandiford wrote:
> This patch adds the SVE instruction definitions and associated OP_*
> enum values.
>
> OK to install?
>
> Thanks,
> Richard
>
>
> include/opcode/
> * aarch64.h (AARCH64_FEATURE_SVE): New macro.
> (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
> (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
> (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
>
> opcodes/
> * aarch64-tbl.h (OP_SVE_B, OP_SVE_BB, OP_SVE_BBBU, OP_SVE_BMB)
> (OP_SVE_BPB, OP_SVE_BUB, OP_SVE_BUBB, OP_SVE_BUU, OP_SVE_BZ)
> (OP_SVE_BZB, OP_SVE_BZBB, OP_SVE_BZU, OP_SVE_DD, OP_SVE_DDD)
> (OP_SVE_DMD, OP_SVE_DMH, OP_SVE_DMS, OP_SVE_DU, OP_SVE_DUD, OP_SVE_DUU)
> (OP_SVE_DUV_BHS, OP_SVE_DUV_BHSD, OP_SVE_DZD, OP_SVE_DZU, OP_SVE_HB)
> (OP_SVE_HMD, OP_SVE_HMS, OP_SVE_HU, OP_SVE_HUU, OP_SVE_HZU, OP_SVE_RR)
> (OP_SVE_RURV_BHSD, OP_SVE_RUV_BHSD, OP_SVE_SMD, OP_SVE_SMH, OP_SVE_SMS)
> (OP_SVE_SU, OP_SVE_SUS, OP_SVE_SUU, OP_SVE_SZS, OP_SVE_SZU, OP_SVE_UB)
> (OP_SVE_UUD, OP_SVE_UUS, OP_SVE_VMR_BHSD, OP_SVE_VMU_SD)
> (OP_SVE_VMVD_BHS, OP_SVE_VMVU_BHSD, OP_SVE_VMVU_SD, OP_SVE_VMVV_BHSD)
> (OP_SVE_VMVV_SD, OP_SVE_VMV_BHSD, OP_SVE_VMV_HSD, OP_SVE_VMV_SD)
> (OP_SVE_VM_SD, OP_SVE_VPU_BHSD, OP_SVE_VPV_BHSD, OP_SVE_VRR_BHSD)
> (OP_SVE_VRU_BHSD, OP_SVE_VR_BHSD, OP_SVE_VUR_BHSD, OP_SVE_VUU_BHSD)
> (OP_SVE_VUVV_BHSD, OP_SVE_VUVV_SD, OP_SVE_VUV_BHSD, OP_SVE_VUV_SD)
> (OP_SVE_VU_BHSD, OP_SVE_VU_HSD, OP_SVE_VU_SD, OP_SVE_VVD_BHS)
> (OP_SVE_VVU_BHSD, OP_SVE_VVVU_SD, OP_SVE_VVV_BHSD, OP_SVE_VVV_SD)
> (OP_SVE_VV_BHSD, OP_SVE_VV_HSD_BHS, OP_SVE_VV_SD, OP_SVE_VWW_BHSD)
> (OP_SVE_VXX_BHSD, OP_SVE_VZVD_BHS, OP_SVE_VZVU_BHSD, OP_SVE_VZVV_BHSD)
> (OP_SVE_VZVV_SD, OP_SVE_VZV_SD, OP_SVE_V_SD, OP_SVE_WU, OP_SVE_WV_BHSD)
> (OP_SVE_XU, OP_SVE_XUV_BHSD, OP_SVE_XVW_BHSD, OP_SVE_XV_BHSD)
> (OP_SVE_XWU, OP_SVE_XXU): New macros.
> (aarch64_feature_sve): New variable.
> (SVE): New macro.
> (_SVE_INSN): Likewise.
> (aarch64_opcode_table): Add SVE instructions.
> * aarch64-opc.h (extract_fields): Declare.
> * aarch64-opc-2.c: Regenerate.
> * aarch64-asm.c (do_misc_encoding): Handle the new SVE aarch64_ops.
> * aarch64-asm-2.c: Regenerate.
> * aarch64-dis.c (extract_fields): Make global.
> (do_misc_decoding): Handle the new SVE aarch64_ops.
> * aarch64-dis-2.c: Regenerate.
>
> gas/
> * doc/c-aarch64.texi: Document the "sve" feature.
> * config/tc-aarch64.c (REG_TYPE_R_Z_BHSDQ_VZP): New register type.
> (get_reg_expected_msg): Handle it.
> (aarch64_check_reg_type): Likewise.
> (parse_operands): When parsing operands of an SVE instruction,
> disallow immediates that match REG_TYPE_R_Z_BHSDQ_VZP.
> (aarch64_features): Add an entry for SVE.
>
I presume the idea of using _SVE_INSN (like _LSE_INSN and others of
similar form) is to make the macro name have a fixed width. I'll point
out that such names encroach upon the compiler and library reserved name
spaces so aren't strictly portable. I think it would generally be
better if we used SVE__INSN and similar if we really want a fixed length
name.
OK, but we should look into fixing the above at some point.
R.