This is the mail archive of the binutils@sourceware.org mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH, MIPS] Ensure default ASEs are applied for an architecture


Hi,

MIPS GAS allows an architecture have a set of ASEs implicitly enabled
if they are guaranteed to be available.  Some architectures are
represented as unique CPUs in the GAS internals and some are just
baseline architecture with some ASEs on top.  In the latter case the
default ASEs fail to be applied leading to issues like PR/21219.

This was caused some time ago by:

commit 919731affbef19fcad8dddb0a595bb05755cb345
Author: mfortune <matthew.fortune@imgtec.com>
Date:   Tue May 20 13:28:20 2014 +0100

    Add MIPS .module directive

Proposed fix is to store the ASEs explicitly along with the
architecture in file_mips_opts so that the second case identified
above works. 

Regression tested on mips-mti-elf. No regressions.

Thanks,
Matthew

gas/

	* config/tc-mips.c (struct mips_set_options): Add init_ase
	field.
	(file_mips_opts): Zero init_ase.
	(mips_opts): Likewise.
	(file_mips_check_options): Use file_mips_opts.init_ase to
	set enabled ases.
	(mips_after_parse_args): Set init_ases.
	(parse_code_option): Likewise.
	(s_mipsset): Likewise.
	* testsuite/gas/mips/34kc-mt.d: New file.
	* testsuite/gas/mips/34kc-mt.d: Likewise.
	* testsuite/gas/mips/mips.exp: Run 34kc-mt test.
---
 gas/config/tc-mips.c             | 22 +++++++++++++++-------
 gas/testsuite/gas/mips/34kc-mt.d | 12 ++++++++++++
 gas/testsuite/gas/mips/34kc-mt.s |  5 +++++
 gas/testsuite/gas/mips/mips.exp  |  1 +
 4 files changed, 33 insertions(+), 7 deletions(-)
 create mode 100644 gas/testsuite/gas/mips/34kc-mt.d
 create mode 100644 gas/testsuite/gas/mips/34kc-mt.s

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 54b94be..f0689c1 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -262,6 +262,12 @@ struct mips_set_options
   /* 1 if single-precision operations on odd-numbered registers are
      allowed.  */
   int oddspreg;
+
+  /* The set of ASEs that should be enabled for the user specified
+     architecture.  This cannot be inferred from 'arch' for all cores
+     as processors only have a unique 'arch' if they add architecture
+     specific instructions (UDI).  */
+  int init_ase;
 };
 
 /* Specifies whether module level options have been checked yet.  */
@@ -283,7 +289,8 @@ static struct mips_set_options file_mips_opts =
   /* noreorder */ 0,  /* at */ ATREG, /* warn_about_macros */ 0,
   /* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ FALSE,
   /* gp */ -1, /* fp */ -1, /* arch */ CPU_UNKNOWN, /* sym32 */ FALSE,
-  /* soft_float */ FALSE, /* single_float */ FALSE, /* oddspreg */ -1
+  /* soft_float */ FALSE, /* single_float */ FALSE, /* oddspreg */ -1,
+  /* init_ase */ 0
 };
 
 /* This is similar to file_mips_opts, but for the current set of options.  */
@@ -294,7 +301,8 @@ static struct mips_set_options mips_opts =
   /* noreorder */ 0,  /* at */ ATREG, /* warn_about_macros */ 0,
   /* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ FALSE,
   /* gp */ -1, /* fp */ -1, /* arch */ CPU_UNKNOWN, /* sym32 */ FALSE,
-  /* soft_float */ FALSE, /* single_float */ FALSE, /* oddspreg */ -1
+  /* soft_float */ FALSE, /* single_float */ FALSE, /* oddspreg */ -1,
+  /* init_ase */ 0
 };
 
 /* Which bits of file_ase were explicitly set or cleared by ASE options.  */
@@ -3918,8 +3926,6 @@ mips_check_options (struct mips_set_options *opts, bfd_boolean abi_checks)
 static void
 file_mips_check_options (void)
 {
-  const struct mips_cpu_info *arch_info = 0;
-
   if (file_mips_opts_checked)
     return;
 
@@ -3962,8 +3968,6 @@ file_mips_check_options (void)
 	file_mips_opts.fp = 32;
     }
 
-  arch_info = mips_cpu_info_from_arch (file_mips_opts.arch);
-
   /* Disable operations on odd-numbered floating-point registers by default
      when using the FPXX ABI.  */
   if (file_mips_opts.oddspreg < 0)
@@ -4007,7 +4011,7 @@ file_mips_check_options (void)
 
   /* If the user didn't explicitly select or deselect a particular ASE,
      use the default setting for the CPU.  */
-  file_mips_opts.ase |= (arch_info->ase & ~file_ase_explicit);
+  file_mips_opts.ase |= (file_mips_opts.init_ase & ~file_ase_explicit);
 
   /* Set up the current options.  These may change throughout assembly.  */
   mips_opts = file_mips_opts;
@@ -14769,6 +14773,7 @@ mips_after_parse_args (void)
 
   file_mips_opts.arch = arch_info->cpu;
   file_mips_opts.isa = arch_info->isa;
+  file_mips_opts.init_ase = arch_info->ase;
 
   /* Set up initial mips_opts state.  */
   mips_opts = file_mips_opts;
@@ -16133,6 +16138,7 @@ parse_code_option (char * name)
 	    {
 	      mips_opts.arch = p->cpu;
 	      mips_opts.isa = p->isa;
+	      mips_opts.init_ase = p->ase;
 	      isa_set = TRUE;
 	    }
 	}
@@ -16147,6 +16153,7 @@ parse_code_option (char * name)
 	    {
 	      mips_opts.arch = p->cpu;
 	      mips_opts.isa = p->isa;
+	      mips_opts.init_ase = p->ase;
 	      isa_set = TRUE;
 	    }
 	}
@@ -16221,6 +16228,7 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
     {
       mips_opts.isa = file_mips_opts.isa;
       mips_opts.arch = file_mips_opts.arch;
+      mips_opts.init_ase = file_mips_opts.init_ase;
       mips_opts.gp = file_mips_opts.gp;
       mips_opts.fp = file_mips_opts.fp;
     }
diff --git a/gas/testsuite/gas/mips/34kc-mt.d b/gas/testsuite/gas/mips/34kc-mt.d
new file mode 100644
index 0000000..f5ac635
--- /dev/null
+++ b/gas/testsuite/gas/mips/34kc-mt.d
@@ -0,0 +1,12 @@
+#objdump: -dr --prefix-addresses -M reg-names=numeric
+#name: MIPS 34kc MT ASE default
+#as: -32 -march=34kc
+
+# Test the abs macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> mttc0	\$4,\$25,1
+0+0004 <[^>]*> mftc0	\$25,\$4
+	...
diff --git a/gas/testsuite/gas/mips/34kc-mt.s b/gas/testsuite/gas/mips/34kc-mt.s
new file mode 100644
index 0000000..ab68fdb
--- /dev/null
+++ b/gas/testsuite/gas/mips/34kc-mt.s
@@ -0,0 +1,5 @@
+# Source file used to test that the MT ase is enabled by default for 34kc.
+foo:
+	mttc0	$4,$25,1
+	mftc0	$25,$4,0
+	.space	8
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index f0c6c34..086ba2a 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1347,6 +1347,7 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test_arches "mips32-dspr3"	[mips_arch_list_matching mips32r6]
     run_dump_test "mips64-dsp"
     run_dump_test "mips32-mt"
+    run_dump_test "34kc-mt"
 
     run_dump_test "mips16-dwarf2"
     if $has_newabi {
-- 
2.2.1


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]