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Re: [PATCH] PowerPC VLE changes


Hello Andrew

Here is the patch:

diff -ruN binutils-2.28-orig/opcodes/ppc-opc.c binutils-2.28/opcodes/ppc-opc.c
--- binutils-2.28-orig/opcodes/ppc-opc.c    2017-03-02 11:23:54.000000000 +0300
+++ binutils-2.28/opcodes/ppc-opc.c    2017-03-28 16:51:08.000000000 +0300
@@ -5762,7 +5762,7 @@
 {"mcrxr",    X(31,512),    XBFRARB_MASK, COM,    POWER7,        {BF}},

 {"lbdcbx",    X(31,514),    X_MASK,      E200Z4,    0,        {RT, RA, RB}},
-{"lbdx",    X(31,515),    X_MASK,         E500MC,    0,        {RT, RA, RB}},
+{"lbdx",    X(31,515),    X_MASK,         E500MC|E200Z4,    0,
{RT, RA, RB}},

 {"bblels",    X(31,518),    X_MASK,         PPCBRLK,    0,        {0}},

@@ -5813,7 +5813,7 @@
 {"maskir.",    XRC(31,541,1),    X_MASK,         M601,    0,
{RA, RS, RB}},

 {"lhdcbx",    X(31,546),    X_MASK,      E200Z4,    0,        {RT, RA, RB}},
-{"lhdx",    X(31,547),    X_MASK,         E500MC,    0,        {RT, RA, RB}},
+{"lhdx",    X(31,547),    X_MASK,         E500MC|E200Z4,    0,
{RT, RA, RB}},

 {"lvtrx",    X(31,549),    X_MASK,         PPCVEC2,    0,        {VD,
RA0, RB}},

@@ -5837,7 +5837,7 @@
 {"mcrxrx",    X(31,576),     XBFRARB_MASK, POWER9,    0,        {BF}},

 {"lwdcbx",    X(31,578),    X_MASK,      E200Z4,    0,        {RT, RA, RB}},
-{"lwdx",    X(31,579),    X_MASK,         E500MC,    0,        {RT, RA, RB}},
+{"lwdx",    X(31,579),    X_MASK,         E500MC|E200Z4,    0,
{RT, RA, RB}},

 {"lvtlx",    X(31,581),    X_MASK,         PPCVEC2,    0,        {VD,
RA0, RB}},

@@ -5888,7 +5888,7 @@
 {"lfdux",    X(31,631),    X_MASK,         COM,    PPCEFS,
{FRT, RAS, RB}},

 {"stbdcbx",    X(31,642),    X_MASK,      E200Z4,    0,        {RS, RA, RB}},
-{"stbdx",    X(31,643),    X_MASK,         E500MC,    0,        {RS, RA, RB}},
+{"stbdx",    X(31,643),    X_MASK,         E500MC|E200Z4,    0,
 {RS, RA, RB}},

 {"stvlx",    X(31,647),    X_MASK,         CELL,    0,        {VS, RA0, RB}},
 {"stbfcmux",    APU(31,647,0),    APU_MASK,    PPC405,    0,
{FCRT, RA, RB}},
@@ -5926,7 +5926,7 @@
 {"sre.",    XRC(31,665,1),    X_MASK,         M601,    0,        {RA, RS, RB}},

 {"sthdcbx",    X(31,674),    X_MASK,      E200Z4,    0,        {RS, RA, RB}},
-{"sthdx",    X(31,675),    X_MASK,         E500MC,    0,        {RS, RA, RB}},
+{"sthdx",    X(31,675),    X_MASK,         E500MC|E200Z4,    0,
 {RS, RA, RB}},

 {"stvfrx",    X(31,677),    X_MASK,         PPCVEC2,    0,
{VS, RA0, RB}},

@@ -5944,7 +5944,7 @@
 {"sriq.",    XRC(31,696,1),    X_MASK,         M601,    0,
{RA, RS, SH}},

 {"stwdcbx",    X(31,706),    X_MASK,         E200Z4,    0,
{RS, RA, RB}},
-{"stwdx",    X(31,707),    X_MASK,         E500MC,    0,        {RS, RA, RB}},
+{"stwdx",    X(31,707),    X_MASK,         E500MC|E200Z4,    0,
 {RS, RA, RB}},

 {"stvflx",    X(31,709),    X_MASK,         PPCVEC2,    0,
{VS, RA0, RB}},

@@ -7020,9 +7020,7 @@
 {"se_cmphl",    SE_RR(3,3),    SE_RR_MASK,    PPCVLE,    0,        {RX, RY}},

 {"e_cmpi",    SCI8BF(6,0,21),    SCI8BF_MASK,    PPCVLE,    0,
{CRD32, RA, SCLSCI8}},
-{"e_cmpwi",    SCI8BF(6,0,21),    SCI8BF_MASK,    PPCVLE,    0,
 {CRD32, RA, SCLSCI8}},
 {"e_cmpli",    SCI8BF(6,1,21),    SCI8BF_MASK,    PPCVLE,    0,
 {CRD32, RA, SCLSCI8}},
-{"e_cmplwi",    SCI8BF(6,1,21),    SCI8BF_MASK,    PPCVLE,    0,
  {CRD32, RA, SCLSCI8}},
 {"e_addi",    SCI8(6,16),    SCI8_MASK,    PPCVLE,    0,        {RT,
RA, SCLSCI8}},
 {"e_subi",    SCI8(6,16),    SCI8_MASK,    PPCVLE,    0,        {RT,
RA, SCLSCI8N}},
 {"e_addi.",    SCI8(6,17),    SCI8_MASK,    PPCVLE,    0,        {RT,
RA, SCLSCI8}},
@@ -7273,6 +7271,8 @@
 {"clrlslwi", 4,    PPCCOM,    "rlwinm %0,%1,%3,(%2)-(%3),31-(%3)"},
 {"clrlslwi.",4, PPCCOM,    "rlwinm. %0,%1,%3,(%2)-(%3),31-(%3)"},

+{"e_cmpwi",  3, PPCVLE, "e_cmpi %0,%1,%2"},
+{"e_cmplwi", 3, PPCVLE, "e_cmpli %0,%1,%2"},
 {"e_extlwi", 4,    PPCVLE, "e_rlwinm %0,%1,%3,0,(%2)-1"},
 {"e_extrwi", 4,    PPCVLE, "e_rlwinm
%0,%1,((%2)+(%3))&((%2)+(%3)<>32),32-(%2),31"},
 {"e_inslwi", 4,    PPCVLE, "e_rlwimi
%0,%1,(-(%3)!31)&((%3)|31),%3,(%2)+(%3)-1"},


Alex

2017-03-27 17:32 GMT+03:00 Andrew Jenner <andrew@codesourcery.com>:
> Hi Alexander,
>
> On 24/03/2017 15:32, Александр Федотов wrote:
>>
>> I have question in continuation of
>> https://sourceware.org/ml/binutils/2016-07/msg00342.html
>>
>> Why do you need to have "e_cmpwi" etc in vle_opcodes table ? It seems
>> they are just alias names because of the same opcodes and objdump
>> never show them.
>> Why don't to use powerpc_macros instead ?
>>
>> And it seems that following instructions must be marked as E200Z4 also
>> respectively to MPC5748G Reference Manual:
>>
>> lbdx
>> lhdx
>> lwdx
>> stbdx
>> sthdx
>> stwdx
>
>
> You may very well be right, on both counts. If you'd like to propose a
> patch, I'll take a look and run tests on it. Otherwise, I'll look into
> making these changes next time I'm doing some VLE work.
>
> Thanks,
>
> Andrew



-- 
Best regards,
AF


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