[PATCH] [ARC] Update conditions for illegal placed instructions.

[Claudiu Zissulescu <Claudiu dot Zissulescu at synopsys dot com>]

From: claziss <claziss@synopsys.com>

ARC cpus do not accept any jump or instructions with long immediate
into the delay slots.

Fix the issue, add a test.

Ok to apply?
Claudiu

gas/
2017-06-07  Claudiu Zissulescu  <claziss@synopsys.com>

	* /config/tc-arc.c (is_br_jmp_insn_p): Update macro with known
	instructions to be accounted as jumps.
	(assemble_insn): Check for limms into the delay slots.  Emit an
	error if so.
	* testsuite/gas/arc/asm-errors-3.d: New file.
	* testsuite/gas/arc/asm-errors-3.err: Likewise.
	* testsuite/gas/arc/asm-errors-3.s: Likewise.
---
 gas/config/tc-arc.c                    | 22 ++++++++++++++++++++--
 gas/testsuite/gas/arc/asm-errors-3.d   |  2 ++
 gas/testsuite/gas/arc/asm-errors-3.err |  7 +++++++
 gas/testsuite/gas/arc/asm-errors-3.s   | 14 ++++++++++++++
 4 files changed, 43 insertions(+), 2 deletions(-)
 create mode 100644 gas/testsuite/gas/arc/asm-errors-3.d
 create mode 100644 gas/testsuite/gas/arc/asm-errors-3.err
 create mode 100644 gas/testsuite/gas/arc/asm-errors-3.s

diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index e51e85e..146dd8e 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -107,8 +107,21 @@ enum arc_rlx_types
 #define is_spfp_p(op)           (((sc) == SPX))
 #define is_dpfp_p(op)           (((sc) == DPX))
 #define is_fpuda_p(op)          (((sc) == DPA))
-#define is_br_jmp_insn_p(op)    (((op)->insn_class == BRANCH \
-				  || (op)->insn_class == JUMP))
+#define is_br_jmp_insn_p(op)    (((op)->insn_class == BRANCH		\
+				  || (op)->insn_class == JUMP		\
+				  || (op)->insn_class == BRCC		\
+				  || (op)->insn_class == BBIT0		\
+				  || (op)->insn_class == BBIT1		\
+				  || (op)->insn_class == BI		\
+				  || (op)->insn_class == BBIT0		\
+				  || (op)->insn_class == EI		\
+				  || (op)->insn_class == ENTER		\
+				  || (op)->insn_class == JLI		\
+				  || (op)->insn_class == LOOP		\
+				  || (op)->insn_class == LEAVE		\
+				  || (op)->insn_class == SJLI		\
+				  || (op)->insn_class == BBIT0		\
+				  ))
 #define is_kernel_insn_p(op)    (((op)->insn_class == KERNEL))
 #define is_nps400_p(op)         (((sc) == NPS400))
 
@@ -4102,6 +4115,11 @@ assemble_insn (const struct arc_opcode *opcode,
     as_bad (_("Insn %s has a jump/branch instruction %s in its delay slot."),
 	    arc_last_insns[1].opcode->name,
 	    arc_last_insns[0].opcode->name);
+  if (arc_last_insns[1].has_delay_slot
+      && arc_last_insns[0].has_limm)
+    as_bad (_("Insn %s has an instruction %s with limm in its delay slot."),
+	    arc_last_insns[1].opcode->name,
+	    arc_last_insns[0].opcode->name);
 }
 
 void
diff --git a/gas/testsuite/gas/arc/asm-errors-3.d b/gas/testsuite/gas/arc/asm-errors-3.d
new file mode 100644
index 0000000..aa34c86
--- /dev/null
+++ b/gas/testsuite/gas/arc/asm-errors-3.d
@@ -0,0 +1,2 @@
+#as:
+#error-output: asm-errors-3.err
diff --git a/gas/testsuite/gas/arc/asm-errors-3.err b/gas/testsuite/gas/arc/asm-errors-3.err
new file mode 100644
index 0000000..735508e
--- /dev/null
+++ b/gas/testsuite/gas/arc/asm-errors-3.err
@@ -0,0 +1,7 @@
+[^:]*: Assembler messages:
+[^:]*:4: Error: Insn bl has an instruction st with limm in its delay slot.
+[^:]*:6: Error: Insn bl has an instruction st with limm in its delay slot.
+[^:]*:8: Error: Insn bl has a jump/branch instruction breq in its delay slot.
+[^:]*:10: Error: Insn bl has a jump/branch instruction bl in its delay slot.
+[^:]*:12: Error: Insn bl has a jump/branch instruction bbit0 in its delay slot.
+[^:]*:14: Error: Insn bl has a jump/branch instruction ei_s in its delay slot.
diff --git a/gas/testsuite/gas/arc/asm-errors-3.s b/gas/testsuite/gas/arc/asm-errors-3.s
new file mode 100644
index 0000000..e198a2e
--- /dev/null
+++ b/gas/testsuite/gas/arc/asm-errors-3.s
@@ -0,0 +1,14 @@
+	.cpu ARCHS
+.L1:
+	bl.d	@foo
+	st	1,[@a]
+	bl.d	@foo
+	st	@a,[r1]
+	bl.d	@foo
+	breq	r0,r1,@.L1
+	bl.d	@foo
+	bl 	@foo
+	bl.d	@foo
+	bbit0	r0,r1,@.L1
+	bl.d	@foo
+	ei_s	1
-- 
1.9.1