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Re: [PATCH] RISC-V: Fix disassembly of c.addi4spn, c.addi16sp, c.lui when imm=0
- From: Nick Clifton <nickc at redhat dot com>
- To: Palmer Dabbelt <palmer at dabbelt dot com>, binutils at sourceware dot org
- Cc: patches at groups dot riscv dot org, Andrew Waterman <andrew at sifive dot com>
- Date: Mon, 23 Oct 2017 10:49:17 +0100
- Subject: Re: [PATCH] RISC-V: Fix disassembly of c.addi4spn, c.addi16sp, c.lui when imm=0
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Hi Palmer,
> opcodes/ChangeLog
>
> 2017-10-20 Andrew Waterman <andrew@sifive.com>
>
> * riscv-opc.c (match_c_addi16sp) : New function.
> (match_c_addi4spn): New function.
> (match_c_lui): Don't allow 0-immediate encodings.
> (riscv_opcodes) <addi>: Use the above functions.
> <add>: Likewise.
> <c.addi4spn>: Likewise.
> <c.addi16sp>: Likewise.
Please could you, or Andrew, add an assembler testcase for this patch ?
Cheers
Nick