This is the mail archive of the binutils@sourceware.org mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] RISC-V: Fix disassembly of c.addi4spn, c.addi16sp, c.lui when imm=0


Hi Palmer,

> opcodes/ChangeLog
> 
> 2017-10-20  Andrew Waterman  <andrew@sifive.com>
> 
>         * riscv-opc.c (match_c_addi16sp) : New function.
>         (match_c_addi4spn): New function.
>         (match_c_lui): Don't allow 0-immediate encodings.
>         (riscv_opcodes) <addi>: Use the above functions.
>         <add>: Likewise.
>         <c.addi4spn>: Likewise.
>         <c.addi16sp>: Likewise.
 
Please could you, or Andrew, add an assembler testcase for this patch ?

Cheers
  Nick


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]