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[PATCH] x86: don't default variable shift count insns to 8-bit operand size
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Fri, 10 Nov 2017 05:55:01 -0700
- Subject: [PATCH] x86: don't default variable shift count insns to 8-bit operand size
- Authentication-results: sourceware.org; auth=none
Just like %dx in I/O instructions isn't suitable to derive operand size
information, %cl source operands of shift instructions aren't.
gas/
2017-11-10 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (process_suffix): Treat .shiftcount just like
.inoutportreg.
* testsuite/gas/i386/inval.s: Add ambiguous shift/rotate cases.
* testsuite/gas/i386/inval.l: Adjust expectations.
--- 2017-11-10/gas/config/tc-i386.c
+++ 2017-11-10/gas/config/tc-i386.c
@@ -5431,7 +5431,8 @@ process_suffix (void)
}
for (op = i.operands; --op >= 0;)
- if (!i.tm.operand_types[op].bitfield.inoutportreg)
+ if (!i.tm.operand_types[op].bitfield.inoutportreg
+ && !i.tm.operand_types[op].bitfield.shiftcount)
{
if (i.types[op].bitfield.reg8)
{
--- 2017-11-10/gas/testsuite/gas/i386/inval.l
+++ 2017-11-10/gas/testsuite/gas/i386/inval.l
@@ -80,6 +80,9 @@
.*:87: Error: .*
.*:88: Error: .*
.*:90: Error: .*
+.*:92: Error: .*shl.*
+.*:93: Error: .*rol.*
+.*:94: Error: .*rcl.*
GAS LISTING .*
@@ -176,3 +179,7 @@ GAS LISTING .*
[ ]*88[ ]+movzx eax, \[eax\]
[ ]*89[ ]+
[ ]*90[ ]+movnti word ptr \[eax\], ax
+[ ]*[1-9][0-9]*[ ]+
+[ ]*[1-9][0-9]*[ ]+shl \[eax\], 1
+[ ]*[1-9][0-9]*[ ]+rol \[ecx\], 2
+[ ]*[1-9][0-9]*[ ]+rcl \[edx\], cl
--- 2017-11-10/gas/testsuite/gas/i386/inval.s
+++ 2017-11-10/gas/testsuite/gas/i386/inval.s
@@ -88,3 +88,7 @@ movzx ax, [eax]
movzx eax, [eax]
movnti word ptr [eax], ax
+
+ shl [eax], 1
+ rol [ecx], 2
+ rcl [edx], cl