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[PATCH] [GAS] [AArch64] Updated AArch64 docs for Armv8.4-a.
- From: Tamar Christina <tamar dot christina at arm dot com>
- To: binutils at sourceware dot org
- Cc: nd at arm dot com, Richard dot Earnshaw at arm dot com, marcus dot shawcroft at arm dot com
- Date: Mon, 13 Nov 2017 11:00:50 +0000
- Subject: [PATCH] [GAS] [AArch64] Updated AArch64 docs for Armv8.4-a.
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Hi All,
This patch adds the updated documentation for the new Armv8.4-a changes.
Ok for master?
Thanks,
Tamar
gas/
2017-11-13 Tamar Christina <tamar.christina@arm.com>
* doc/c-aarch64.texi (armv8.4-a, sha2, sha3, sm4): New.
(dotprod): Update default note.
--
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index c6eeda8b522c59aaa64b39b7123b0f9c1ee51124..7d872b0049f9e466f4d2aa7e4a82276cfb9755a5 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -90,7 +90,7 @@ This option specifies the target architecture. The assembler will
issue an error message if an attempt is made to assemble an
instruction which will not execute on the target architecture. The
following architecture names are recognized: @code{armv8-a},
-@code{armv8.1-a}, @code{armv8.2-a} and @code{armv8.3-a}.
+@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a} and @code{armv8.4-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are
@@ -140,7 +140,15 @@ automatically cause those extensions to be disabled.
@item @code{crc} @tab ARMv8-A @tab ARMv8.1-A or later
@tab Enable CRC instructions.
@item @code{crypto} @tab ARMv8-A @tab No
- @tab Enable cryptographic extensions. This implies @code{fp} and @code{simd}.
+ @tab Enable cryptographic extensions. This implies @code{fp}, @code{simd}, @code{aes} and @code{sha2}.
+@item @code{aes} @tab ARMv8-A @tab No
+ @tab Enable the AES cryptographic extensions. This implies @code{fp} and @code{simd}.
+@item @code{sha2} @tab ARMv8-A @tab No
+ @tab Enable the SHA2 cryptographic extensions. This implies @code{fp} and @code{simd}.
+@item @code{sha3} @tab ARMv8.2-A @tab No
+ @tab Enable the ARMv8.2-A SHA2 and SHA3 cryptographic extensions. This implies @code{fp}, @code{simd} and @code{sha2}.
+@item @code{sm4} @tab ARMv8.2-A @tab No
+ @tab Enable the ARMv8.2-A SM3 and SM4 cryptographic extensions. This implies @code{fp} and @code{simd}.
@item @code{fp} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable floating-point extensions.
@item @code{fp16} @tab ARMv8.2-A @tab ARMv8.2-A or later
@@ -166,7 +174,7 @@ automatically cause those extensions to be disabled.
@item @code{sve} @tab ARMv8.2-A @tab No
@tab Enable the Scalable Vector Extensions. This implies @code{fp16},
@code{simd} and @code{compnum}.
-@item @code{dotprod} @tab ARMv8.2-A @tab No
+@item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
@tab Enable the Dot Product extension. This implies @code{simd}.
@end multitable