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Re: [PATCH][BINUTILs][GAS][AArch64] Correct disassembly of dot product instructions. [Patch (2/2)]
- From: Tamar Christina <Tamar dot Christina at arm dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: nd <nd at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, "Marcus Shawcroft" <Marcus dot Shawcroft at arm dot com>
- Date: Mon, 18 Dec 2017 11:47:54 +0000
- Subject: Re: [PATCH][BINUTILs][GAS][AArch64] Correct disassembly of dot product instructions. [Patch (2/2)]
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________________________________________
From: binutils-owner@sourceware.org <binutils-owner@sourceware.org> on behalf of Tamar Christina <tamar.christina@arm.com>
Sent: Thursday, December 7, 2017 3:50:21 PM
To: binutils@sourceware.org
Cc: nd; Richard Earnshaw; Marcus Shawcroft
Subject: [PATCH][BINUTILs][GAS][AArch64] Correct disassembly of dot product instructions. [Patch (2/2)]
Hi All,
Dot products deviate from the normal disassembly rules for lane indexed
instruction. Their canonical representation is in the form of:
v0.2s, v0.8b, v0.4b[0] instead of v0.2s, v0.8b, v0.b[0] to try to denote
that these instructions select 4x 1 byte elements instead of a single 1 byte
element.
Previously we were disassembling them following the normal rules, this patch
corrects the disassembly.
Regtested on:
* aarch64-none-elf (cross)
* aarch64_be-none-elf (cross)
* aarch64-none-elf (native)
* aarch64-none-elf (native on 32bit host)
and no issues.
Ok for master?
Thanks,
Tamar.
gas/
2017-12-07 Tamar Christina <tamar.christina@arm.com>
PR gas/22559
* config/tc-aarch64.c (vectype_to_qualifier): Support AARCH64_OPND_QLF_S_4B.
* gas/testsuite/gas/aarch64/dotproduct.d: Update disassembly.
include/
2017-12-07 Tamar Christina <tamar.christina@arm.com>
PR gas/22559
* aarch64.h (aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_S_4B.
opcodes/
2017-12-07 Tamar Christina <tamar.christina@arm.com>
PR gas/22559
* aarch64-asm.c (aarch64_ins_reglane): Change AARCH64_OPND_QLF_S_B to
AARCH64_OPND_QLF_S_4B
* aarch64-dis.c (aarch64_ext_reglane): Change AARCH64_OPND_QLF_S_B to
AARCH64_OPND_QLF_S_4B
* aarch64-opc.c (aarch64_opnd_qualifiers): Add 4b variant.
* aarch64-tbl.h (QL_V2DOT): Change S_B to S_4B.
--