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Re: [PATCH 2/3] x86-64: Update tests for -z separate-code
On Thu, Feb 15, 2018 at 5:01 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> "-z separate-code" generates different addresses. Update these tests
> to accept any addresses.
>
> * testsuite/ld-x86-64/bnd-ifunc-1.d: Updated.
> * testsuite/ld-x86-64/ilp32-4.d: Likewise.
> * testsuite/ld-x86-64/pr14207.d: Likewise.
This is the patch I am checking in.
--
H.J.
From c441b6234389c02408b9273a1446b46ee99a94f4 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Fri, 16 Feb 2018 09:56:58 -0800
Subject: [PATCH] x86-64: Update tests for -z separate-code
"-z separate-code" generates different addresses. Update these tests
to accept any addresses.
* testsuite/ld-x86-64/bnd-ifunc-1.d: Updated.
* testsuite/ld-x86-64/ilp32-4.d: Likewise.
---
ld/ChangeLog | 5 +++++
ld/testsuite/ld-x86-64/bnd-ifunc-1.d | 2 +-
ld/testsuite/ld-x86-64/ilp32-4.d | 18 +++++++++---------
3 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 7012160b24..902b2c44d2 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,8 @@
+2018-02-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/ld-x86-64/bnd-ifunc-1.d: Updated.
+ * testsuite/ld-x86-64/ilp32-4.d: Likewise.
+
2018-02-16 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-x86-64/mpx.exp: Add -z max-page-size=0x200000
diff --git a/ld/testsuite/ld-x86-64/bnd-ifunc-1.d b/ld/testsuite/ld-x86-64/bnd-ifunc-1.d
index 13e86bbd64..f62a977df7 100644
--- a/ld/testsuite/ld-x86-64/bnd-ifunc-1.d
+++ b/ld/testsuite/ld-x86-64/bnd-ifunc-1.d
@@ -3,5 +3,5 @@
#objdump: -dw
#...
-[ ]*[a-f0-9]+: f2 e8 f0 ff ff ff bnd callq 210 <\*ABS\*\+0x218@plt>
+[ ]*[a-f0-9]+: f2 e8 f0 ff ff ff bnd callq [a-f0-9]+ <\*ABS\*\+0x[a-f0-9]+@plt>
#pass
diff --git a/ld/testsuite/ld-x86-64/ilp32-4.d b/ld/testsuite/ld-x86-64/ilp32-4.d
index 00d54c4453..74c5ede0c3 100644
--- a/ld/testsuite/ld-x86-64/ilp32-4.d
+++ b/ld/testsuite/ld-x86-64/ilp32-4.d
@@ -8,22 +8,22 @@ There are 9 section headers, starting at offset .*:
Section Headers:
\[Nr\] Name Type Addr Off Size ES Flg Lk Inf Al
\[ 0\] NULL 00000000 000000 000000 00 0 0 0
- \[ 1\] .hash HASH 00000094 000094 000028 04 A 2 0 4
- \[ 2\] .dynsym DYNSYM 000000bc 0000bc 000050 10 A 3 1 4
- \[ 3\] .dynstr STRTAB 0000010c 00010c 000019 00 A 0 0 1
- \[ 4\] .text PROGBITS 00000125 000125 000001 00 AX 0 0 1
- \[ 5\] .dynamic DYNAMIC 00200128 000128 000058 08 WA 3 0 4
+ \[ 1\] .hash HASH [0-9a-f]+ [0-9a-f]+ 000028 04 A 2 0 4
+ \[ 2\] .dynsym DYNSYM [0-9a-f]+ [0-9a-f]+ 000050 10 A 3 1 4
+ \[ 3\] .dynstr STRTAB [0-9a-f]+ [0-9a-f]+ 000019 00 A 0 0 1
+ \[ 4\] .text PROGBITS [0-9a-f]+ [0-9a-f]+ 000001 00 AX 0 0 1
+ \[ 5\] .dynamic DYNAMIC [0-9a-f]+ [0-9a-f]+ 000058 08 WA 3 0 4
\[ 6\] .symtab SYMTAB 00000000 [0-9a-f]+ [0-9a-f]+ 10 7 [0-9] 4
\[ 7\] .strtab STRTAB 00000000 [0-9a-f]+ [0-9a-f]+ 00 0 0 1
\[ 8\] .shstrtab STRTAB 00000000 [0-9a-f]+ 000040 00 0 0 1
Key to Flags:
#...
-Dynamic section at offset 0x128 contains 6 entries:
+Dynamic section at offset 0x[0-9a-f]+ contains 6 entries:
Tag Type Name/Value
- 0x00000004 \(HASH\) 0x94
- 0x00000005 \(STRTAB\) 0x10c
- 0x00000006 \(SYMTAB\) 0xbc
+ 0x00000004 \(HASH\) 0x[0-9a-f]+
+ 0x00000005 \(STRTAB\) 0x[0-9a-f]+
+ 0x00000006 \(SYMTAB\) 0x[0-9a-f]+
0x0000000a \(STRSZ\) 25 \(bytes\)
0x0000000b \(SYMENT\) 16 \(bytes\)
0x00000000 \(NULL\) 0x0
--
2.14.3