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Re: [PATCH] RISC-V: Add .insn support
I think permitting 4-operand integer instructions is fine.
On Wed, Mar 7, 2018 at 10:21 AM, Jim Wilson <jimw@sifive.com> wrote:
> On Wed, Mar 7, 2018 at 2:04 AM, Andrew Waterman <andrew@sifive.com> wrote:
>> Thanks for contributing this patch. I did not thoroughly review the
>> code, but I like the approach. Jim or Palmer will probably follow up
>> with additional comments.
>
> I looked at the previous version of the patch a month or so ago, and
> the only curious thing I noticed is that the 4-operand instruction
> pattern has type I, but in the ISA these are only used for FP
> instructions. I'm not sure if this can be fixed though, since we
> don't have any category that covers all FP extensions: F, D, Q. Plus
> someone might want to try using a 4-operand instruction with integer
> operands so it is probably reasonable to allow that.
>
> My schedule is very hectic at the moment, as I'm in the middle of
> moving to a new home closer to work. I should be able to find time to
> look at this new version of the patch sometime soon.
>
> Jim