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Re: [PATCH] x86: Remove support for old (<= 2.8.1) versions of gcc
On Thu, Mar 8, 2018 at 12:35 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 07.03.18 at 19:23, <hjl.tools@gmail.com> wrote:
>> On Wed, Mar 7, 2018 at 6:08 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>> Let me work on dropping OldGcc.
>>
>> Here is a patch which does that.
>>
>> Any comments?
>
> Would you mind also removing OLDGCC_COMPAT from opcode/i386.h?
Done.
> Looks fine to me beyond that, provided you're convinced this
> removal is fine to do now.
>
I believe so. I am checking in this patch.
Thanks.
--
H.J.
From 70f08ba3e472b1cfc18ea120d06e7822a146d94f Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Wed, 7 Mar 2018 10:06:35 -0800
Subject: [PATCH] x86: Remove support for old (<= 2.8.1) versions of gcc
Old (<= 2.8.1) versions of gcc generate broken fsubp, fsubrp, fdivp and
fdivrp instructions. Assembler translates them to correct ones with a
warning:
[hjl@gnu-cfl-1 gas]$ cat x.s
fsubp %st(3),%st
[hjl@gnu-cfl-1 gas]$ gcc -c x.s
x.s: Assembler messages:
x.s:1: Warning: translating to `fsubp %st,%st(3)'
[hjl@gnu-cfl-1 gas]$
This patch removes support for old (<= 2.8.1) versions of gcc:
[hjl@gnu-cfl-1 gas]$ ./as-new -o x.o x.s
x.s: Assembler messages:
x.s:1: Error: operand type mismatch for `fsubp'
[hjl@gnu-cfl-1 gas]$
gas/
* NEWS: Mention -mold-gcc removal.
* config/tc-i386.c (i386_error): Remove old_gcc_only.
(old_gcc): Removed.
(match_template): Remove old gcc support.
(OPTION_MOLD_GCC): Removed.
(OPTION_MRELAX_RELOCATIONS): Updated.
(md_longopts): Remove OPTION_MOLD_GCC.
(md_parse_option): Likewise.
(md_show_usage): Remove -mold-gcc.
* testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old
(<= 2.8.1) versions of gcc.
* gas/testsuite/gas/i386/intel.s: Likewise.
* testsuite/gas/i386/general.l: Updated.
* gas/testsuite/gas/i386/intel.d: Likewise.
* testsuite/gas/i386/intel.e: Likewise.
* testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general.
include/
* opcode/i386 (OLDGCC_COMPAT): Removed.
opcodes/
* i386-gen.c (opcode_modifiers): Remove OldGcc.
* i386-opc.h (OldGcc): Removed.
(i386_opcode_modifier): Remove oldgcc.
* i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
instructions for old (<= 2.8.1) versions of gcc.
* i386-tbl.h: Regenerated.
---
gas/NEWS | 2 +
gas/config/tc-i386.c | 22 +-
gas/testsuite/gas/i386/general.l | 16 +-
gas/testsuite/gas/i386/general.s | 8 +-
gas/testsuite/gas/i386/i386.exp | 2 +-
gas/testsuite/gas/i386/intel.d | 8 +-
gas/testsuite/gas/i386/intel.e | 4 -
gas/testsuite/gas/i386/intel.s | 8 +-
include/opcode/i386.h | 6 -
opcodes/i386-gen.c | 1 -
opcodes/i386-opc.h | 3 -
opcodes/i386-opc.tbl | 8 -
opcodes/i386-tbl.h | 10686 ++++++++++++++++++-------------------
13 files changed, 5295 insertions(+), 5479 deletions(-)
diff --git a/gas/NEWS b/gas/NEWS
index 8a4b93a726..4cb6d738c3 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Remove -mold-gcc command-line option for x86 targets.
+
* Add -O[2|s] command-line options to x86 assembler to enable alternate
shorter instruction encoding.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index a10a36c5cc..c9985fc720 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -265,7 +265,6 @@ enum i386_error
number_of_operands_mismatch,
invalid_instruction_suffix,
bad_imm4,
- old_gcc_only,
unsupported_with_intel_mnemonic,
unsupported_syntax,
unsupported,
@@ -565,9 +564,6 @@ static int intel64;
0 if att mnemonic. */
static int intel_mnemonic = !SYSV386_COMPAT;
-/* 1 if support old (<= 2.8.1) versions of gcc. */
-static int old_gcc = OLDGCC_COMPAT;
-
/* 1 if pseudo registers are permitted. */
static int allow_pseudo_reg = 0;
@@ -5253,11 +5249,6 @@ match_template (char mnem_suffix)
if (!found_cpu_match)
continue;
- /* Check old gcc support. */
- i.error = old_gcc_only;
- if (!old_gcc && t->opcode_modifier.oldgcc)
- continue;
-
/* Check AT&T mnemonic. */
i.error = unsupported_with_intel_mnemonic;
if (intel_mnemonic && t->opcode_modifier.attmnemonic)
@@ -5554,9 +5545,6 @@ check_reverse:
case bad_imm4:
err_msg = _("constant doesn't fit in 4 bits");
break;
- case old_gcc_only:
- err_msg = _("only supported with old gcc");
- break;
case unsupported_with_intel_mnemonic:
err_msg = _("unsupported with Intel mnemonic");
break;
@@ -10294,7 +10282,7 @@ const char *md_shortopts = "qnO::";
#define OPTION_MSYNTAX (OPTION_MD_BASE + 6)
#define OPTION_MINDEX_REG (OPTION_MD_BASE + 7)
#define OPTION_MNAKED_REG (OPTION_MD_BASE + 8)
-#define OPTION_MOLD_GCC (OPTION_MD_BASE + 9)
+#define OPTION_MRELAX_RELOCATIONS (OPTION_MD_BASE + 9)
#define OPTION_MSSE2AVX (OPTION_MD_BASE + 10)
#define OPTION_MSSE_CHECK (OPTION_MD_BASE + 11)
#define OPTION_MOPERAND_CHECK (OPTION_MD_BASE + 12)
@@ -10310,7 +10298,6 @@ const char *md_shortopts = "qnO::";
#define OPTION_MAMD64 (OPTION_MD_BASE + 22)
#define OPTION_MINTEL64 (OPTION_MD_BASE + 23)
#define OPTION_MFENCE_AS_LOCK_ADD (OPTION_MD_BASE + 24)
-#define OPTION_MRELAX_RELOCATIONS (OPTION_MD_BASE + 25)
struct option md_longopts[] =
{
@@ -10330,7 +10317,6 @@ struct option md_longopts[] =
{"msyntax", required_argument, NULL, OPTION_MSYNTAX},
{"mindex-reg", no_argument, NULL, OPTION_MINDEX_REG},
{"mnaked-reg", no_argument, NULL, OPTION_MNAKED_REG},
- {"mold-gcc", no_argument, NULL, OPTION_MOLD_GCC},
{"msse2avx", no_argument, NULL, OPTION_MSSE2AVX},
{"msse-check", required_argument, NULL, OPTION_MSSE_CHECK},
{"moperand-check", required_argument, NULL, OPTION_MOPERAND_CHECK},
@@ -10602,10 +10588,6 @@ md_parse_option (int c, const char *arg)
allow_naked_reg = 1;
break;
- case OPTION_MOLD_GCC:
- old_gcc = 1;
- break;
-
case OPTION_MSSE2AVX:
sse2avx = 1;
break;
@@ -10916,8 +10898,6 @@ md_show_usage (FILE *stream)
fprintf (stream, _("\
-mnaked-reg don't require `%%' prefix for registers\n"));
fprintf (stream, _("\
- -mold-gcc support old (<= 2.8.1) versions of gcc\n"));
- fprintf (stream, _("\
-madd-bnd-prefix add BND prefix for all valid branches\n"));
fprintf (stream, _("\
-mshared disable branch optimization for shared code\n"));
diff --git a/gas/testsuite/gas/i386/general.l b/gas/testsuite/gas/i386/general.l
index f0ddfc7d3d..17bf88f12d 100644
--- a/gas/testsuite/gas/i386/general.l
+++ b/gas/testsuite/gas/i386/general.l
@@ -24,10 +24,6 @@
.*:132: Warning:.*
.*:133: Warning:.*
.*:134: Warning:.*
-.*:135: Warning:.*
-.*:136: Warning:.*
-.*:137: Warning:.*
-.*:138: Warning:.*
.*:139: Warning:.*
.*:140: Warning:.*
.*:141: Warning:.*
@@ -194,14 +190,10 @@
.*Warning:.*
134 014a DECA fmulp %st\(2\),%st
.*Warning:.*
- 135 014c DEE3 fsubp %st\(3\),%st
-.*Warning:.*
- 136 014e DEEC fsubrp %st\(4\),%st
-.*Warning:.*
- 137 0150 DEF5 fdivp %st\(5\),%st
-.*Warning:.*
- 138 0152 DEFE fdivrp %st\(6\),%st
-.*Warning:.*
+ 135 014c D8E3 fsub %st\(3\),%st
+ 136 014e D8EC fsubr %st\(4\),%st
+ 137 0150 D8F5 fdiv %st\(5\),%st
+ 138 0152 D8FE fdivr %st\(6\),%st
139 0154 DEC1 fadd
.*Warning:.*
140 0156 DEE1 fsub
diff --git a/gas/testsuite/gas/i386/general.s b/gas/testsuite/gas/i386/general.s
index 385b478990..a0ea660842 100644
--- a/gas/testsuite/gas/i386/general.s
+++ b/gas/testsuite/gas/i386/general.s
@@ -132,10 +132,10 @@
fcompl %st(5)
faddp %st(1),%st
fmulp %st(2),%st
- fsubp %st(3),%st
- fsubrp %st(4),%st
- fdivp %st(5),%st
- fdivrp %st(6),%st
+ fsub %st(3),%st
+ fsubr %st(4),%st
+ fdiv %st(5),%st
+ fdivr %st(6),%st
fadd
fsub
fmul
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 8ee3586e52..5a47b7fe0f 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -40,7 +40,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
set ASFLAGS "$ASFLAGS --32"
run_list_test "float" "-al -mmnemonic=att"
- run_list_test "general" "-al --listing-lhs-width=2 -mold-gcc"
+ run_list_test "general" "-al --listing-lhs-width=2"
run_list_test "inval" "-al"
run_list_test "inval-16" "-al"
run_list_test "segment" "-al"
diff --git a/gas/testsuite/gas/i386/intel.d b/gas/testsuite/gas/i386/intel.d
index 3f2c3466fa..4d6c4b1f5c 100644
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -652,7 +652,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: de f9 fdivrp %st,%st\(1\)
[ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\)
[ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\)
-[ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\)
+[ ]*[a-f0-9]+: d8 f3 fdiv %st\(3\),%st
[ ]*[a-f0-9]+: de f1 fdivp %st,%st\(1\)
[ ]*[a-f0-9]+: d8 fb fdivr %st\(3\),%st
[ ]*[a-f0-9]+: d8 fb fdivr %st\(3\),%st
@@ -662,7 +662,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: de f1 fdivp %st,%st\(1\)
[ ]*[a-f0-9]+: de f3 fdivp %st,%st\(3\)
[ ]*[a-f0-9]+: de f3 fdivp %st,%st\(3\)
-[ ]*[a-f0-9]+: de f3 fdivp %st,%st\(3\)
+[ ]*[a-f0-9]+: d8 fb fdivr %st\(3\),%st
[ ]*[a-f0-9]+: de c9 fmulp %st,%st\(1\)
[ ]*[a-f0-9]+: d8 cb fmul %st\(3\),%st
[ ]*[a-f0-9]+: d8 cb fmul %st\(3\),%st
@@ -681,7 +681,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: dc 23 fsubl \(%ebx\)
[ ]*[a-f0-9]+: de e9 fsubrp %st,%st\(1\)
[ ]*[a-f0-9]+: de eb fsubrp %st,%st\(3\)
-[ ]*[a-f0-9]+: de eb fsubrp %st,%st\(3\)
+[ ]*[a-f0-9]+: d8 e3 fsub %st\(3\),%st
[ ]*[a-f0-9]+: de eb fsubrp %st,%st\(3\)
[ ]*[a-f0-9]+: d8 eb fsubr %st\(3\),%st
[ ]*[a-f0-9]+: d8 eb fsubr %st\(3\),%st
@@ -691,7 +691,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: de e1 fsubp %st,%st\(1\)
[ ]*[a-f0-9]+: de e3 fsubp %st,%st\(3\)
[ ]*[a-f0-9]+: de e3 fsubp %st,%st\(3\)
-[ ]*[a-f0-9]+: de e3 fsubp %st,%st\(3\)
+[ ]*[a-f0-9]+: d8 eb fsubr %st\(3\),%st
[ ]*[a-f0-9]+: de 3b fidivrs \(%ebx\)
[ ]*[a-f0-9]+: da 3b fidivrl \(%ebx\)
[ ]*[a-f0-9]+: 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%edx
diff --git a/gas/testsuite/gas/i386/intel.e b/gas/testsuite/gas/i386/intel.e
index 9c0e76c8c2..2e479701a8 100644
--- a/gas/testsuite/gas/i386/intel.e
+++ b/gas/testsuite/gas/i386/intel.e
@@ -1,11 +1,7 @@
.*: Assembler messages:
.*:635: Warning: translating to `faddp'
.*:644: Warning: translating to `fdivp'
-.*:653: Warning: translating to `fdivp st\(3\),st'
.*:654: Warning: translating to `fdivrp'
-.*:663: Warning: translating to `fdivrp st\(3\),st'
.*:664: Warning: translating to `fmulp'
.*:673: Warning: translating to `fsubp'
.*:674: Warning: translating to `fsubrp'
-.*:682: Warning: translating to `fsubp st\(3\),st'
-.*:692: Warning: translating to `fsubrp st\(3\),st'
diff --git a/gas/testsuite/gas/i386/intel.s b/gas/testsuite/gas/i386/intel.s
index 54249d35b6..19c5eeac51 100644
--- a/gas/testsuite/gas/i386/intel.s
+++ b/gas/testsuite/gas/i386/intel.s
@@ -650,7 +650,7 @@ fdiv QWORD PTR [ebx]
fdivp
fdivp st(3)
fdivp st(3),st
-fdivp st,st(3)
+fdiv st,st(3)
fdivr
fdivr st(3)
fdivr st,st(3)
@@ -660,7 +660,7 @@ fdivr QWORD PTR [ebx]
fdivrp
fdivrp st(3)
fdivrp st(3),st
-fdivrp st,st(3)
+fdivr st,st(3)
fmul
fmul st(3)
fmul st,st(3)
@@ -679,7 +679,7 @@ fsub DWORD PTR [ebx]
fsub QWORD PTR [ebx]
fsubp
fsubp st(3)
-fsubp st,st(3)
+fsub st,st(3)
fsubp st(3),st
fsubr st(3)
fsubr st,st(3)
@@ -689,7 +689,7 @@ fsubr QWORD PTR [ebx]
fsubrp
fsubrp st(3)
fsubrp st(3),st
-fsubrp st,st(3)
+fsubr st,st(3)
fidivr word ptr [ebx]
fidivr dword ptr [ebx]
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 3b127c48c4..4097275004 100644
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -43,12 +43,6 @@
compatible instructions. */
#define SYSV386_COMPAT 1
#endif
-#ifndef OLDGCC_COMPAT
-/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
- generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
- reversed. */
-#define OLDGCC_COMPAT SYSV386_COMPAT
-#endif
#define MOV_AX_DISP32 0xa0
#define POP_SEG_SHORT 0x07
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index abd4ebf1b1..2993a9f806 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -647,7 +647,6 @@ static bitfield opcode_modifiers[] =
BITFIELD (NoDefMask),
BITFIELD (ImplicitQuadGroup),
BITFIELD (Optimize),
- BITFIELD (OldGcc),
BITFIELD (ATTMnemonic),
BITFIELD (ATTSyntax),
BITFIELD (IntelSyntax),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index ece3f47a6f..aeb845c5a3 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -604,8 +604,6 @@ enum
/* Support encoding optimization. */
Optimize,
- /* Compatible with old (<= 2.8.1) versions of gcc */
- OldGcc,
/* AT&T mnemonic. */
ATTMnemonic,
/* AT&T syntax. */
@@ -682,7 +680,6 @@ typedef struct i386_opcode_modifier
unsigned int nodefmask:1;
unsigned int implicitquadgroup:1;
unsigned int optimize:1;
- unsigned int oldgcc:1;
unsigned int attmnemonic:1;
unsigned int attsyntax:1;
unsigned int intelsyntax:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index dbd8455602..73786a8d75 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -631,8 +631,6 @@ fisub, 1, 0xde, 0x4, 1, CpuFP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, {
fsubp, 2, 0xdee0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
fsubp, 1, 0xdee0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatReg }
fsubp, 0, 0xdee1, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { 0 }
-fsubp, 2, 0xdee0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|ATTSyntax|OldGcc, { FloatReg, FloatAcc }
-fsubp, 2, 0xdee9, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|OldGcc, { FloatReg, FloatAcc }
fsubp, 2, 0xdee8, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatAcc, FloatReg }
fsubp, 1, 0xdee8, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatReg }
fsubp, 0, 0xdee9, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
@@ -650,8 +648,6 @@ fisubr, 1, 0xde, 0x5, 1, CpuFP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf|No_ldSuf,
fsubrp, 2, 0xdee8, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
fsubrp, 1, 0xdee8, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatReg }
fsubrp, 0, 0xdee9, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { 0 }
-fsubrp, 2, 0xdee8, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|ATTSyntax|OldGcc, { FloatReg, FloatAcc }
-fsubrp, 2, 0xdee0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|OldGcc, { FloatReg, FloatAcc }
fsubrp, 2, 0xdee0, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatAcc, FloatReg }
fsubrp, 1, 0xdee0, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatReg }
fsubrp, 0, 0xdee1, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf, { 0 }
@@ -682,8 +678,6 @@ fidiv, 1, 0xde, 0x6, 1, CpuFP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf|No_ldSuf, {
fdivp, 2, 0xdef0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
fdivp, 1, 0xdef0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatReg }
fdivp, 0, 0xdef1, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { 0 }
-fdivp, 2, 0xdef0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|ATTSyntax|OldGcc, { FloatReg, FloatAcc }
-fdivp, 2, 0xdef8, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|OldGcc, { FloatReg, FloatAcc }
fdivp, 2, 0xdef8, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatAcc, FloatReg }
fdivp, 1, 0xdef8, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatReg }
fdivp, 0, 0xdef9, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf, { 0 }
@@ -701,8 +695,6 @@ fidivr, 1, 0xde, 0x7, 1, CpuFP, Modrm|FloatMF|No_bSuf|No_wSuf|No_qSuf|No_ldSuf,
fdivrp, 2, 0xdef8, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatAcc, FloatReg }
fdivrp, 1, 0xdef8, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { FloatReg }
fdivrp, 0, 0xdef9, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTMnemonic|ATTSyntax, { 0 }
-fdivrp, 2, 0xdef8, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|ATTSyntax|OldGcc, { FloatReg, FloatAcc }
-fdivrp, 2, 0xdef0, None, 2, CpuFP, ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Ugh|ATTMnemonic|OldGcc, { FloatReg, FloatAcc }
fdivrp, 2, 0xdef0, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatAcc, FloatReg }
fdivrp, 1, 0xdef0, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf|ShortForm, { FloatReg }
fdivrp, 0, 0xdef1, None, 2, CpuFP, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|No_qSuf, { 0 }