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Re: [PATCH] x86: Optimize with EVEX128 encoding for AVX512VL
>>> On 09.03.18 at 12:21, <hjl.tools@gmail.com> wrote:
> On Fri, Mar 9, 2018 at 12:30 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>> On 09.03.18 at 04:56, <hjl.tools@gmail.com> wrote:
>>> This is the patch I am checking in. If i.vec_encoding == vex_encoding_evex,
>>> we need to use EVEX128 encoding.
>>
>> But this retains some of the ISA extensions problem - only EVEX512
>> should be used without "i.tm.cpu_flags.bitfield.cpuavx512vl ||
>> cpu_arch_isa_flags.bitfield.cpuavx512vl".
>>
>
> The condition is:
>
> && (i.tm.opcode_modifier.vex
> || (!i.mask
> && !i.rounding
> && is_evex_encoding (&i.tm)
> && (i.tm.cpu_flags.bitfield.cpuavx512vl
> || cpu_arch_isa_flags.bitfield.cpuavx512vl)))
>
> For EVEX512 instructions, if
>
> i.tm.cpu_flags.bitfield.cpuavx512vl ||
> cpu_arch_isa_flags.bitfield.cpuavx512vl
>
> false, the optimization is disabled.
Oh, yes, I see - that asn't visible from the patch alone. I'm sorry
for the noise. I now also see why you could nicely get rid of that
extra loop over the register numbers.
Jan