src/cgen ChangeLog desc-cpu.scm sid-cpu.scm si ...

[devans at sourceware dot org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	devans@sourceware.org	2009-06-20 21:34:28

Modified files:
	cgen           : ChangeLog desc-cpu.scm sid-cpu.scm 
	                 sid-decode.scm sid-model.scm sim-arch.scm 
	                 sim-cpu.scm sim-decode.scm sim-model.scm 

Log message:
	* desc-cpu.scm (cgen-desc.h): Tweak logit message for consistency.
	(cgen-desc.c): Ditto.
	* sid-cpu.scm (cgen-desc.h, cgen-cpu.h, cgen-defs.h): Ditto.
	(cgen-write.cxx, cgen-semantics.cxx, cgen-sem-switch.cxx): Ditto.
	* sid-decode.scm (cgen-decode.h, cgen-decode.cxx): Ditto.
	* sid-model.scm (cgen-model.cxx, cgen-model.h): Ditto.
	* sim-arch.scm (cgen-arch.h, cgen-arch.c): Ditto.
	(cgen-cpuall.h, cgen-ops.c): Ditto.
	* sim-cpu.scm (cgen-cpu.h, cgen-defs.h, cgen-cpu.c): Ditto.
	(cgen-read.c, cgen-write.c, cgen-semantics.c): Ditto.
	(cgen-sem-switch.c): Ditto.
	* sim-decode.scm (cgen-decode.h, cgen-decode.c): Ditto.
	* sim-model.c (cgen-model.c): Ditto.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/ChangeLog.diff?cvsroot=src&r1=1.277&r2=1.278
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/desc-cpu.scm.diff?cvsroot=src&r1=1.22&r2=1.23
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sid-cpu.scm.diff?cvsroot=src&r1=1.18&r2=1.19
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sid-decode.scm.diff?cvsroot=src&r1=1.15&r2=1.16
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sid-model.scm.diff?cvsroot=src&r1=1.10&r2=1.11
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-arch.scm.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-cpu.scm.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-decode.scm.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cgen/sim-model.scm.diff?cvsroot=src&r1=1.6&r2=1.7