This is the mail archive of the
cgen@sources.redhat.com
mailing list for the CGEN project.
Re: sim's -DPROFILE=1 conflicts with CGEN's PROFILE attribute
"Frank Ch. Eigler" <fche@redhat.com> writes:
> On Wed, Nov 15, 2000 at 12:56:30PM -0700, Greg McGary wrote:
> : #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
> : #define A(a) (1 << CGEN_HW_##a)
> : #else
> : #define A(a) (1 << CGEN_HW_/**/a)
> : #endif
>
> Thanks, that's a neat way to solve the problem. (There is some precedent
> elsewhere in the toolchain for assuming ANSI compliance in compilers,
> so the non-## case may not even be needed any more.)
OK. I'd rather assume ANSI. If it ever becomes a bootstrap issue, we
can fix it then. I don't foresee that it can cause bootstrap problems
until CGEN output becomes part of GCC.
I left these two alone, since XCONCAT* means that the caller wants
args to be expanded prior to concatenation (though the extra expansion
is already provided by defining SEM_FN_NAME() as an intermediate):
sem.c:#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
sem.c:#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
> If you send a patch (see cgen/desc-cpu.scm and opc-itab.scm), you can get
> your name into the ChangeLog.
Yippee! Everlasting fame! 8^)
FYI, I plan to do more CGEN hacking in the coming weeks & months. I'd
like to get write-after-approval permission on the CVS repo. Is that
agreeable? With whom should I set it up? I already have an account
`gkm@sourceware.cygnus.com' for GCC, and executed an assignment of all
future changes for GCC/gas/ld/binutils several years ago. Are sim & cgen
considered part of binutils for copyright assignment purposes, or must
I execute a new assignment?
(Tested minimally by building sim for i960)
2000-11-15 Greg McGary <greg@mcgary.org>
* desc-cpu.scm (gen-ifld-defns, gen-hw-table-defns,
-gen-hash-defines, gen-operand-table, gen-insn-table):
Replace CONCAT[23] with inline concatination via `##'.
* opc-itab.scm (-gen-ifmt-table, -gen-insn-opcode-table,
-gen-macro-insn-table): Likewise.
* opc-opinst.scm (-gen-operand-instance-tables): Likewise.
Index: desc-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/desc-cpu.scm,v
retrieving revision 1.2
diff -u -p -r1.2 desc-cpu.scm
--- desc-cpu.scm 2000/10/02 19:13:53 1.2
+++ desc-cpu.scm 2000/11/15 20:31:05
@@ -135,7 +135,7 @@ static const CGEN_MACH @arch@_cgen_mach_
"\
/* The instruction field table. */
-#define A(a) (1 << CONCAT2 (CGEN_IFLD_,a))
+#define A(a) (1 << CGEN_IFLD_##a)
const CGEN_IFLD @arch@_cgen_ifld_table[] =
{
@@ -251,7 +251,7 @@ const CGEN_IFLD @arch@_cgen_ifld_table[]
/* The hardware table. */
-#define A(a) (1 << CONCAT2 (CGEN_HW_,a))
+#define A(a) (1 << CGEN_HW_##a)
const CGEN_HW_ENTRY @arch@_cgen_hw_table[] =
{
@@ -294,7 +294,7 @@ const CGEN_HW_ENTRY @arch@_cgen_hw_table
(string-list
"#define CGEN_ARCH @arch@\n\n"
"/* Given symbol S, return @arch@_cgen_<S>. */\n"
- "#define CGEN_SYM(s) CONCAT3 (@arch@,_cgen_,s)\n\n"
+ "#define CGEN_SYM(s) @arch@##_cgen_##s\n\n"
"/* Selected cpu families. */\n"
; FIXME: Move to sim's arch.h.
(string-map (lambda (cpu)
@@ -384,8 +384,8 @@ const CGEN_HW_ENTRY @arch@_cgen_hw_table
"\
/* The operand table. */
-#define A(a) (1 << CONCAT2 (CGEN_OPERAND_,a))
-#define OPERAND(op) CONCAT2 (@ARCH@_OPERAND_,op)
+#define A(a) (1 << CGEN_OPERAND_##a)
+#define OPERAND(op) @ARCH@_OPERAND_##op
const CGEN_OPERAND @arch@_cgen_operand_table[] =
{
@@ -478,7 +478,7 @@ const CGEN_OPERAND @arch@_cgen_operand_t
(num-non-bools (attr-count-non-bools all-attrs)))
(string-write
"\
-#define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
+#define A(a) (1 << CGEN_INSN_##a)
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
/* The instruction table. */
Index: opc-itab.scm
===================================================================
RCS file: /cvs/src/src/cgen/opc-itab.scm,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 opc-itab.scm
--- opc-itab.scm 2000/07/28 04:11:52 1.1.1.1
+++ opc-itab.scm 2000/11/15 20:31:05
@@ -214,7 +214,7 @@
(define (-gen-ifmt-table)
(string-write
"/* Instruction formats. */\n\n"
- "#define F(f) & @arch@_cgen_ifld_table[CONCAT2 (@ARCH@_,f)]\n\n"
+ "#define F(f) & @arch@_cgen_ifld_table[@ARCH@_##f]\n\n"
(string-list-map -gen-ifmt-table-1 (current-ifmt-list))
"#undef F\n\n"
)
@@ -351,9 +351,9 @@
(num-non-bools (attr-count-non-bools all-attrs)))
(string-write
"\
-#define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
+#define A(a) (1 << CGEN_INSN_##a)
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
-#define OPERAND(op) CONCAT2 (@ARCH@_OPERAND_,op)
+#define OPERAND(op) @ARCH@_OPERAND_##op
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
/* The instruction table. */
@@ -549,7 +549,7 @@ static unsigned int dis_hash_insn PARAMS
(num-non-bools (attr-count-non-bools all-attrs)))
(string-write
"/* Formats for ALIAS macro-insns. */\n\n"
- "#define F(f) & @arch@_cgen_ifld_table[CONCAT2 (@ARCH@_,f)]\n\n"
+ "#define F(f) & @arch@_cgen_ifld_table[@ARCH@_##f]\n\n"
(lambda ()
(string-write-map -gen-ifmt-table-1
(map insn-ifmt (find (lambda (minsn)
@@ -569,9 +569,9 @@ static unsigned int dis_hash_insn PARAMS
" { 0, 0 }\n};\n\n")))
minsn-list))
"\
-#define A(a) (1 << CONCAT2 (CGEN_INSN_,a))
+#define A(a) (1 << CGEN_INSN_##a)
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
-#define OPERAND(op) CONCAT2 (@ARCH@_OPERAND_,op)
+#define OPERAND(op) @ARCH@_OPERAND_##op
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
/* The macro instruction table. */
Index: opc-opinst.scm
===================================================================
RCS file: /cvs/src/src/cgen/opc-opinst.scm,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 opc-opinst.scm
--- opc-opinst.scm 2000/07/28 04:11:52 1.1.1.1
+++ opc-opinst.scm 2000/11/15 20:31:05
@@ -66,7 +66,7 @@
#define OUTPUT CGEN_OPINST_OUTPUT
#define END CGEN_OPINST_END
#define COND_REF CGEN_OPINST_COND_REF
-#define OP_ENT(op) CONCAT2 (@ARCH@_OPERAND_,op)
+#define OP_ENT(op) @ARCH@_OPERAND_##op
"
(lambda () (string-write-map -gen-operand-instance-table (current-sfmt-list)))