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Obscure names


Pavel Baranov writes:
 > I'm trying to understand how CGEN works and thanks to CGEN manual
 > the overall picture is more or less clear. One thing which is not described
 > in this manual (or I couldn't find the description) is the names like
 > 'src1', 'src2,
 > 'sr', 'dr' in .cpu files in Model/Unit descriptions (for example in
 > m32r.cpu). I can guess
 > that these are some kind of register names but I haven't seen list of
 > possible names
 > and their descriptions. Can you help me with this information?

These are register operand names that are invented by the person doing
the port.  Generally one tries to pick identical names to what's in the
architecture reference manual.  The m32r manual uses dr and sr,
hence m32r.cpu uses dr and sr.  The fr30 manual uses Rj and Ri
thus fr30.cpu uses Rj and Ri.

If you look in m32r.cpu you'll see this:

(dnop sr     "source register"              () h-gr   f-r2)
(dnop dr     "destination register"         () h-gr   f-r1)

Those are what's refered to in

  (unit u-exec "Execution Unit" ()
	1 1 ; issue done
	() ; state
	((sr INT -1) (dr INT -1)) ; inputs
	((dr INT -1)) ; outputs
	() ; profile action (default)
	)

[and so on for all the other names/registers]


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