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Broken decoder for 16/32 ISAs
- To: cgen at sources dot redhat dot com
- Subject: Broken decoder for 16/32 ISAs
- From: Ben Elliston <bje at redhat dot com>
- Date: Thu, 31 May 2001 23:08:27 +1000 (EST)
I have been debugging a problem in the generated decoder for the
simulators. Here is the scenario, involving an ISA with a mix of 16
and 32 bit instructions (and lsb0? set to #f, so most significant bit
is bit 0).
The 16 bit instructions are laid out like so:
+---------+---------+
| insn16 | |
+---------+---------+
0 15
And the 32 bit instructions are laid out like so:
+-------------------+
| insn32 |
+-------------------+
0 31
The (-gen-decode-bits) function computes, amonst other things, the
amount to shift a sequence of bits to the right, whereby they are then
masked and examined by the decoder.
For the architecture I've briefly described above, I believe the logic
in utils-sim.scm is wrong:
(shift (- (if lsb0?
(- first bits -1)
(- (+ start size) (+ first bits))) <----
pos)))
The line indicated is used to compute the shift value when lsb0? is
#f. Even for 16 bit instructions, the shift value needs to be at
least 16 to get at the bits of insn16 (see above).
The `size' variable seems to be passed in by callers, but it's unclear
how this value is calculated or what it is meant to be in a variable
length ISA. Shouldn't size really be the sizeof(insn) here? I'm a
bit out of my depth in this part of cgen, but any suggestions would be
much appreciated.
For now, I'm using the patch below.
Ben
Index: utils-sim.scm
===================================================================
RCS file: /cvs/cvsfiles/devo/cgen/utils-sim.scm,v
retrieving revision 1.15
diff -u -r1.15 utils-sim.scm
--- utils-sim.scm 2000/12/04 18:34:37 1.15
+++ utils-sim.scm 2001/05/31 12:47:54
@@ -546,7 +546,7 @@
; FIXME: Need to handle left (-ve) shift.
(shift (- (if lsb0?
(- first bits -1)
- (- (+ start size) (+ first bits)))
+ (- (+ start 32) (+ first bits)))
pos)))
(string-append
" | ((" val " >> " (number->string shift)