Re: [patch][rfa]: Decoding insns > 32 bits in length

[Dave Brolley <brolley at redhat dot com>]

Dave Brolley wrote:

>>
> This would only affect architectures which resort to the base-insn + 
> (additional insn words) model for decoding insns. Do we have any of 
> these? The fr30 has 48 bit insns, but is not a SID simulator. The case 
> which bit me was like this:
>
> The architecture has 16 bit insns which may be followed by 1 or two 
> additional immediate words (16 bits each). In the case that the insn 
> was followed by two additional immediates, the decoder was generating
>
>  word_1 = current_cpu->GETIMEMUSI (pc, pc + 2);
>    f_dest_addr_2 = (0|(EXTRACT_MSB0_UINT (word_1, 32, 16, 32) << 0));
>    f_source_addr_1 = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 16) << 0));
>
> Note the length for the extract of 'f_dest_addr_2' which should be 16, 
> but is computed as 32. This is because (in utils-gen.scm), end==32 and 
> word-end==32. Therefore word-length gets substituted as the number of 
> bits to extract.

Correction: end==48 and word-end==48 ---- same result