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RE: Weirdness in disassembly
- From: "Michael Chapman" <Michael dot Chapman at synopsys dot com>
- To: "Frank Ch. Eigler" <fche at redhat dot com>,"Michael Chapman" <Michael dot Chapman at synopsys dot COM>
- Cc: <cgen at sources dot redhat dot com>
- Date: Fri, 27 Sep 2002 17:02:48 +0200
- Subject: RE: Weirdness in disassembly
Hi,
That was a quick answer!
No - there are no fixed bit patterns in the second 16 bits.
They are just used for offsets or absolute addresses.
Everything is little endian.
I just changed what you said - it does not seemt to change
anything - (yes I regenerated the files!)
It is true a haven't really
understood what the lengths really all mean. I have at the
moment:-
(define-isa
; Name of the ISA.
(name dw32)
(comment "Basic DW32 instruction set")
; (Size of unknown instructions)
(default-insn-word-bitsize 16)
; Shortest instruction is 16 bits
(default-insn-bitsize 16)
(base-insn-bitsize 32)
)
Any more ideas?
Mike
-----Original Message-----
From: Frank Ch. Eigler [mailto:fche@redhat.com]
Sent: Friday, 27 September, 2002 16:51
To: Michael Chapman
Cc: cgen@sources.redhat.com
Subject: Re: Weirdness in disassembly
Hi -
On Fri, Sep 27, 2002 at 04:46:42PM +0200, Michael Chapman wrote:
> I have just started out to experiment with cgen.
Welcome!
> I have instructions which are 16 and 32 bits long.
> The assembler generates the right instructions with
> the right lengths. [...]
The choice of parameters in the define-isa clause is crucial
for variable-length instruction sets. If any of your 32-bit
instructions contain any fixed bit patterns in the second 16
bits, you need to set "base-insn-bitsize 32", since opcodes/simulators
will need to fetch 32 bits to uniquely identify a cgen-level
instruction. Setting that to 16 could explain what you're seeing.
- FChE