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exposed pipeline patch (long!)


Ben Elliston writes:
 > --- rtl-c.scm	8 Sep 2000 22:18:37 -0000	1.4
 > +++ rtl-c.scm	9 Jan 2003 03:22:25 -0000
 > @@ -1304,7 +1304,23 @@
 >  			"bad arg to `operand'" object-or-name)))
 >  )
 >  
 > -(define-fn xop (estate options mode object) object)
 > +(define-fn xop (estate options mode object) 
 > +  (let ((delayed (assoc '#:delay (estate-modifiers estate))))
 > +    (if (and delayed
 > +	     (equal? APPLICATION 'SID-SIMULATOR)
 > +	     (operand? object))
 > +	;; if we're looking at an operand inside a (delay ...) rtx, then we
 > +	;; are talking about a _delayed_ operand, which is a different
 > +	;; beast.  rather than try to work out what context we were
 > +	;; constructed within, we just clone the operand instance and set
 > +	;; the new one to have a delayed value. the setters and getters
 > +	;; will work it out.
 > +	(let ((obj (object-copy object))
 > +	      (amount (cadr delayed)))
 > +	  (op:set-delay! obj amount)
 > +	  obj)
 > +	;; else return the normal object
 > +	object)))

This feels like something semantic-compile would do.
Any reason to not do this there?

 > -(define-fn delay (estate options mode n rtx)
 > -  (s-sequence (estate-with-modifiers estate '((#:delay))) VOID '() rtx) ; wip!
 > -)
 > +(define-fn delay (estate options mode num-node rtx)
 > +  (case APPLICATION
 > +    ((SID-SIMULATOR)
 > +     (let* ((n (cadddr num-node))
 > +	    (old-delay (let ((old (assoc '#:delay (estate-modifiers estate))))
 > +			 (if old (cadr old) 0)))
 > +	    (new-delay (+ n old-delay)))    
 > +       (begin
 > +	 ;; check for proper usage
 > +     	 (if (let* ((hw (case (car rtx) 
 > +			  ((operand) (op:type (rtx-operand-obj rtx)))
 > +			  ((xop) (op:type (rtx-xop-obj rtx)))
 > +			  (else #f))))		    	       
 > +	       (not (and hw (or (pc? hw) (memory? hw) (register? hw)))))
 > +	     (context-error 
 > +	      (estate-context estate) 
 > +	      (string-append 
 > +	       "(delay ...) rtx applied to wrong type of operand '" (car rtx) "'. should be pc, register or memory")))
 > +	 ;; signal an error if we're delayed and not in a "parallel-insns" CPU
 > +	 (if (not (with-parallel?)) 
 > +	     (context-error 	      
 > +	      (estate-context estate) 
 > +	      "delayed operand in a non-parallel cpu"))
 > +	 ;; update cpu-global pipeline bound
 > +	 (cpu-set-max-delay! (current-cpu) (max (cpu-max-delay (current-cpu)) new-delay))      
 > +	 ;; pass along new delay to embedded rtx
 > +	 (rtx-eval-with-estate rtx mode (estate-with-modifiers estate `((#:delay ,new-delay)))))))
 > +
 > +    ;; not in sid-land
 > +    (else (s-sequence (estate-with-modifiers estate '((#:delay))) VOID '() rtx))))

The check for with-parallel? needs to be removed.
[If you want to move it to sid go for it.]

Calling cpu-set-max-delay! here is wrong.
If we want it done in cgen-proper, the general place to put this is in
semantic-compile.

NOTE: Apps are perfectly free to have their own post processing pass
of the rtl and have their own file like rtl-c.scm that works on the
post-processed form.  This is one perfectly legit way to go, and
it doesn't require hooks.

 >  ; Gets expanded as a macro.
 >  ;(define-fn annul (estate yes?)
 > Index: operand.scm
 > ===================================================================
 > RCS file: /cvs/src/src/cgen/operand.scm,v
 > retrieving revision 1.5
 > diff -u -p -r1.5 operand.scm
 > --- operand.scm	20 Dec 2002 06:39:04 -0000	1.5
 > +++ operand.scm	9 Jan 2003 03:22:29 -0000
 > @@ -90,6 +90,9 @@
 >  		; referenced.  #f means the operand is always referenced by
 >  		; the instruction.
 >  		(cond? . #f)
 > +		
 > +		; whether (and by how much) this instance of the operand is delayed.
 > +		(delayed . #f)
 >  		)
 >  	      nil)
 >  )
 > @@ -135,6 +138,8 @@
 >  (define op:set-num! (elm-make-setter <operand> 'num))
 >  (define op:cond? (elm-make-getter <operand> 'cond?))
 >  (define op:set-cond?! (elm-make-setter <operand> 'cond?))
 > +(define op:delay (elm-make-getter <operand> 'delayed))
 > +(define op:set-delay! (elm-make-setter <operand> 'delayed))

I _think_ adding `delayed' to <operand> is ok.
Guess I don't have a strong opinion.

 >  ; Compute the hardware type lazily.
 >  ; FIXME: op:type should be named op:hwtype or some such.
 > Index: mach.scm
 > ===================================================================
 > RCS file: /cvs/src/src/cgen/mach.scm,v
 > retrieving revision 1.2
 > diff -u -p -r1.2 mach.scm
 > --- mach.scm	12 Jul 2001 02:32:25 -0000	1.2
 > +++ mach.scm	9 Jan 2003 03:22:31 -0000
 > @@ -755,8 +755,7 @@
 >    (apply min (cons 65535
 >  		   (map insn-length (find (lambda (insn)
 >  					    (and (not (has-attr? insn 'ALIAS))
 > -						 (eq? (obj-attr-value insn 'ISA)
 > -						      (obj:name isa))))
 > +						 (isa-supports? isa insn)))
 >  					  (non-multi-insns (current-insn-list))))))
 >  )
 >  
 > @@ -765,9 +764,8 @@
 >    ; [a language with infinite precision can't have max-reduce-iota-0 :-)]
 >    (apply max (cons 0
 >  		   (map insn-length (find (lambda (insn)
 > -					    (and (not (has-attr? insn 'ALIAS))
 > -						 (eq? (obj-attr-value insn 'ISA)
 > -						      (obj:name isa))))
 > +					  (and (not (has-attr? insn 'ALIAS))
 > +						 (isa-supports? isa insn)))
 >  					  (non-multi-insns (current-insn-list))))))
 >  )

I'm guessing these are just no-op simplifications.
They can go in of course, file as a separate patch.
[Note: I don't mind this being included here.
Just trying to help y'all make forward progress.]

 > @@ -1008,13 +1006,19 @@
 >  		; Allow a cpu family to override the isa parallel-insns spec.
 >  		; ??? Concession to the m32r port which can go away, in time.
 >  		parallel-insns
 > +
 > +		; Computed: maximum number of insns which may pass before there
 > +		; an insn writes back its output operands.
 > +		max-delay
 > +
 >  		)
 >  	      nil)
 >  )
 >  
 >  ; Accessors.
 >  
 > -(define-getters <cpu> cpu (word-bitsize insn-chunk-bitsize file-transform parallel-insns))
 > +(define-getters <cpu> cpu (word-bitsize insn-chunk-bitsize file-transform parallel-insns max-delay))
 > +(define-setters <cpu> cpu (max-delay))

I dunno about this one, but I guess I don't have a strong opinion.

 > @@ -1284,13 +1290,13 @@
 >    ; Assert only one cpu family has been selected.
 >    (assert-keep-one)
 >  
 > -  (let ((par-insns (map isa-parallel-insns (current-isa-list)))
 > +  (let ((false->zero (lambda (x) (if x x 0)))
 > +	(par-insns (map isa-parallel-insns (current-isa-list)))
 >  	(cpu-par-insns (cpu-parallel-insns (current-cpu))))
 >      ; ??? The m32r does have parallel execution, but to keep support for the
 >      ; base mach simpler, a cpu family is allowed to override the isa spec.
 > -    (or cpu-par-insns
 > -	; FIXME: ensure all have same value.
 > -	(car par-insns)))
 > +    (max (false->zero cpu-par-insns) 
 > +	 (apply max (map false->zero par-insns))))
 >  )

this is ok.


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