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Re: [RFA:] Fix breakage of manually building SID CPU


Doug Evans wrote:

Dave Brolley writes:
> >So, uh, why would only parallel CPUs have delay-slots?  Or do we
> >actually have differing perceptions and definitions of what a
> >"delay" is?
> >
> It's more of an extension of the notion of what parallel is.

What dictionary are you looking in? :-)


For the record, I agree with you that it's a s-t-r-e-t-c-h.

> The "new" delay implementation [...].
> [...]
> I think that if both can be supported then that would be "a good thing > (tm)".


Both what? Maybe you can elaborate on why both are needed
at the rtl level? [I'm thinking in language terms, not implementation.]


They're not both needed in language terms. Everything can be done using the "new" implementation. I was just thinking that the "old" should still work for legacy code.

Dave


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