Index: desc-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/desc-cpu.scm,v
retrieving revision 1.22
diff -u -p -r1.22 desc-cpu.scm
--- desc-cpu.scm	28 Oct 2005 19:30:02 -0000	1.22
+++ desc-cpu.scm	18 Jun 2009 07:52:56 -0000
@@ -965,7 +965,7 @@ init_tables (void)
 ; Then they'd be usable and we wouldn't have to special case them here.
 
 (define (cgen-desc.h)
-  (logit 1 "Generating " (current-arch-name) " desc.h ...\n")
+  (logit 1 "Generating " (current-arch-name) "-desc.h ...\n")
   (string-write
    (gen-c-copyright "CPU data header for @arch@."
 		  CURRENT-COPYRIGHT CURRENT-PACKAGE)
@@ -1018,7 +1018,7 @@ init_tables (void)
 ; no place to put this file.  To be revisited when we do have such a place.
 
 (define (cgen-desc.c)
-  (logit 1 "Generating " (current-arch-name) " desc.c ...\n")
+  (logit 1 "Generating " (current-arch-name) "-desc.c ...\n")
   (string-write
    (gen-c-copyright "CPU data for @arch@."
 		  CURRENT-COPYRIGHT CURRENT-PACKAGE)
Index: sid-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/sid-cpu.scm,v
retrieving revision 1.18
diff -u -p -r1.18 sid-cpu.scm
--- sid-cpu.scm	14 Jul 2006 18:49:32 -0000	1.18
+++ sid-cpu.scm	18 Jun 2009 07:52:56 -0000
@@ -71,7 +71,7 @@
 ; Generate <cpu>-desc.h.
 
 (define (cgen-desc.h)
-  (logit 1 "Generating " (gen-cpu-name) " desc.h ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-desc.h ...\n")
 
   (string-write
    (gen-c-copyright "Misc. entries in the @arch@ description file."
@@ -287,7 +287,7 @@ namespace @arch@ {
 ; Generate <cpu>-cpu.h
 
 (define (cgen-cpu.h)
-  (logit 1 "Generating " (gen-cpu-name) " cpu.h ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-cpu.h ...\n")
   (assert-keep-one)
 
   ; Turn parallel execution support on if cpu needs it.
@@ -545,7 +545,7 @@ typedef struct @prefix@_trace_record {
 ; Generate <cpu>-defs.h
 
 (define (cgen-defs.h)
-  (logit 1 "Generating " (gen-cpu-name) " defs.h ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-defs.h ...\n")
   (assert-keep-one)
 
   ; Turn parallel execution support on if cpu needs it.
@@ -672,7 +672,7 @@ using namespace cgen;
 ")))
 
 (define (cgen-write.cxx)
-  (logit 1 "Generating " (gen-cpu-name) " write.cxx ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-write.cxx ...\n")
   (assert-keep-one)
 
   (sim-analyze-insns!)
@@ -784,7 +784,7 @@ using namespace cgen;
 ; Each instruction is implemented in its own function.
 
 (define (cgen-semantics.cxx)
-  (logit 1 "Generating " (gen-cpu-name) " semantics.cxx ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-semantics.cxx ...\n")
   (assert-keep-one)
 
   (sim-analyze-insns!)
@@ -1408,7 +1408,7 @@ restart:
 ; Generate sem-switch.cxx.
 
 (define (cgen-sem-switch.cxx)
-  (logit 1 "Generating " (gen-cpu-name) " sem-switch.cxx ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-sem-switch.cxx ...\n")
 
   (sim-analyze-insns!)
   (if (with-sem-frags?)
Index: sid-decode.scm
===================================================================
RCS file: /cvs/src/src/cgen/sid-decode.scm,v
retrieving revision 1.15
diff -u -p -r1.15 sid-decode.scm
--- sid-decode.scm	15 Jun 2005 21:28:19 -0000	1.15
+++ sid-decode.scm	18 Jun 2009 07:52:57 -0000
@@ -667,7 +667,7 @@ void
 ; Entry point.  Generate decode.h.
 
 (define (cgen-decode.h)
-  (logit 1 "Generating " (gen-cpu-name) " decode.h ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-decode.h ...\n")
 
   (sim-analyze-insns!)
 
@@ -723,7 +723,7 @@ typedef UINT @prefix@_insn_word;
 ; Entry point.  Generate decode.cxx.
 
 (define (cgen-decode.cxx)
-  (logit 1 "Generating " (gen-cpu-name) " decode.cxx ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-decode.cxx ...\n")
 
   (sim-analyze-insns!)
 
Index: sid-model.scm
===================================================================
RCS file: /cvs/src/src/cgen/sid-model.scm,v
retrieving revision 1.10
diff -u -p -r1.10 sid-model.scm
--- sid-model.scm	7 Nov 2006 21:12:08 -0000	1.10
+++ sid-model.scm	18 Jun 2009 07:52:57 -0000
@@ -487,7 +487,7 @@ const MACH " (gen-sym mach) "_mach =
 ; Generate model.cxx
 
 (define (cgen-model.cxx)
-  (logit 1 "Generating " (gen-cpu-name) " model.cxx ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-model.cxx ...\n")
   (assert-keep-one)
 
   ; Turn parallel execution support on if cpu needs it.
@@ -520,7 +520,7 @@ using namespace @cpu@; // FIXME: namespa
 )
 
 (define (cgen-model.h)
-  (logit 1 "Generating " (gen-cpu-name) " model.h ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-model.h ...\n")
   (assert-keep-one)
 
   (string-write
Index: sim-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/sim-cpu.scm,v
retrieving revision 1.9
diff -u -p -r1.9 sim-cpu.scm
--- sim-cpu.scm	16 Jul 2003 05:35:48 -0000	1.9
+++ sim-cpu.scm	18 Jun 2009 07:52:57 -0000
@@ -800,7 +800,7 @@ SEM_FN_NAME (@prefix@,init_idesc_table) 
 ; Generate cpu-<cpu>.h
 
 (define (cgen-cpu.h)
-  (logit 1 "Generating " (gen-cpu-name) " cpu.h ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-cpu.h ...\n")
 
   (sim-analyze-insns!)
 
@@ -843,7 +843,7 @@ SEM_FN_NAME (@prefix@,init_idesc_table) 
 ; Generate defs-<isa>.h.
 
 (define (cgen-defs.h)
-  (logit 1 "Generating " (obj:name (current-isa)) " defs.h ...\n")
+  (logit 1 "Generating " (obj:name (current-isa)) "-defs.h ...\n")
 
   (sim-analyze-insns!)
 
@@ -874,7 +874,7 @@ SEM_FN_NAME (@prefix@,init_idesc_table) 
 ; Generate cpu-<cpu>.c
 
 (define (cgen-cpu.c)
-  (logit 1 "Generating " (gen-cpu-name) " cpu.c ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-cpu.c ...\n")
 
   (sim-analyze-insns!)
 
@@ -903,7 +903,7 @@ SEM_FN_NAME (@prefix@,init_idesc_table) 
 ; Generate read.c
 
 (define (cgen-read.c)
-  (logit 1 "Generating " (gen-cpu-name) " read.c ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-read.c ...\n")
 
   (sim-analyze-insns!)
 
@@ -981,7 +981,7 @@ SEM_FN_NAME (@prefix@,init_idesc_table) 
 ; Generate write.c
 
 (define (cgen-write.c)
-  (logit 1 "Generating " (gen-cpu-name) " write.c ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-write.c ...\n")
 
   (sim-analyze-insns!)
 
@@ -1033,7 +1033,7 @@ void
 ; Each instruction is implemented in its own function.
 
 (define (cgen-semantics.c)
-  (logit 1 "Generating " (gen-cpu-name) " semantics.c ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-semantics.c ...\n")
 
   (sim-analyze-insns!)
 
@@ -1082,7 +1082,7 @@ CGEN_ATTR_VALUE (NULL, abuf->idesc->attr
 ; This file consists of just the switch().  It is included by mainloop.c.
 
 (define (cgen-sem-switch.c)
-  (logit 1 "Generating " (gen-cpu-name) " sem-switch.c ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-sem-switch.c ...\n")
 
   (sim-analyze-insns!)
 
Index: sim-decode.scm
===================================================================
RCS file: /cvs/src/src/cgen/sim-decode.scm,v
retrieving revision 1.9
diff -u -p -r1.9 sim-decode.scm
--- sim-decode.scm	8 Jul 2003 16:19:35 -0000	1.9
+++ sim-decode.scm	18 Jun 2009 07:52:57 -0000
@@ -537,7 +537,7 @@ const IDESC *
 ; Entry point.  Generate decode.h.
 
 (define (cgen-decode.h)
-  (logit 1 "Generating " (gen-cpu-name) " decode.h ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-decode.h ...\n")
 
   (sim-analyze-insns!)
 
@@ -564,7 +564,7 @@ const IDESC *
 ; Entry point.  Generate decode.c.
 
 (define (cgen-decode.c)
-  (logit 1 "Generating " (gen-cpu-name) " decode.c ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-decode.c ...\n")
 
   (sim-analyze-insns!)
 
Index: sim-model.scm
===================================================================
RCS file: /cvs/src/src/cgen/sim-model.scm,v
retrieving revision 1.6
diff -u -p -r1.6 sim-model.scm
--- sim-model.scm	16 Jul 2003 05:35:48 -0000	1.6
+++ sim-model.scm	18 Jun 2009 07:52:57 -0000
@@ -367,7 +367,7 @@ const MACH " (gen-sym mach) "_mach =
 ; Generate model.c
 
 (define (cgen-model.c)
-  (logit 1 "Generating " (gen-cpu-name) " model.c ...\n")
+  (logit 1 "Generating " (gen-cpu-name) "-model.c ...\n")
 
   (sim-analyze-insns!)