This is the mail archive of the crossgcc@cygnus.com mailing list for the crossgcc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

Re: gcc 2.7.2.1 optimizer bug?


>
>> On Thu, 12 Mar 1998 14:07:26 -0800 (PST), art@acc.com (Art Berggreen) wrote:
>> >>	subq.w #1,%a1
>> >>	/*   ^ note the size spezifier here 16 bit !!!!!!!!!!!!!! */
>> >Arithmetic operations on 68k address registers are always promoted to
>> >32 bits.
>> `sign extended' would be more accurate.
>> According the the programmer's guide, when an address register is the
>> source of a word operation, only the low 16-bits are used.  When an
>> address register is the destination, the operands are sign-extended
>> to 32-bits.
>
>I dont think this rule applies to subq.w or addq.w instructions. Only
>the low 16 bits of the destination register is affected.
>
>Clive

This is only true for data registers and memory.  Address registers
always have all 32 bits updated (makes sense for dealing with addresses).
Most operations on address registers also don't affect the condition
codes.

>From "M68000 FAMILY Programmer's Reference Manual":

Integer Instructions
MOTOROLA M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL 4-11
ADDQ Add Quick ADDQ (M68000 Family)
Operation: Immediate Data + Destination . Destination
Assembler
Syntax: ADDQ #<data>,<ea>
Attributes: Size = (Byte, Word, Long)
Description: Adds an immediate value of one to eight to the operand at the destination
location. The size of the operation may be specified as byte, word, or long. Word and
long operations are also allowed on the address registers. When adding to address
registers, the condition codes are not altered, and the entire destination address
register is used regardless of the operation size.

Integer Instructions
MOTOROLA M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL 4-181
SUBQ Subtract Quick SUBQ (M68000 Family)
Operation: Destination P Immediate Data . Destination
Assembler
Syntax: SUBQ #<data>,<ea>
Attributes: Size = (Byte, Word, Long)
Description: Subtracts the immediate data (1-8) from the destination operand. The size
of the operation is specified as byte, word, or long. Only word and long operations can
be used with address registers, and the condition codes are not affected. When
subtracting from address registers, the entire destination address register is used,
despite the operation size.

Similar text exists for ADDA and SUBA.

(Note: although most assemblers accept the syntax; ADD, SUB, ADDI and SUBI can't be used
with an address register as destination, but the assembler will automatically substitute
an appropriate machine instruction)

Art