RE: gcc compile

[Jens-Christian Lache <lache at tu-harburg dot de>]

Am Mon, 22 Jan 2001 schrieben Sie:
> > Unfortunately the ARM simulator does not support the several 
> > CPU modes, that
> > the ARM7TDMI has. I made a software trap using "swi", and the 
> > pc was set
> > correctly to 0x8. It did also execute the jump instruction 
> > from this place
> > leading to my own swi handler. But when leaving it, returning to the
> > code containing the swi, the mode was still 0x10, which is 
> > not supervisor
> > mode. 
> 
> 
> How do you return from your SWI handler? Don't forget
> you have to make
> 	movs	pc, lr
> to copy SPSR in CPSR at the same time you return, so
> the mode gets changed.
> 
> CPU modes have been in existence since the very beginning
> of the ARM cores, so I doubt it's not supported!
> 
> Cheers,
> Yves

Donīt know what I am doing wrong. This does also not work:
void swi_handler(int reason) {
  switch(reason) {
  case REASON_CHANGE_TO_SV :
    asm volatile ("mrs r0,cpsr": : :"r0");
    asm volatile ("orr r0, r0, #192": : :"r0");
    asm volatile ("msr cpsr, r0");
  default :
    break;
  }
  asm volatile("movs    pc, lr");
}

Could it be that gdb just donīt show the right value?
Jens-Christian

> 
> 
> 
> ------
> Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
> Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
-- 


Jens-Christian Lache
Technische Universitaet Hamburg-Harburg
www.tu-harburg.de/~sejl1601
Mail:
lache@tu-harburg.de
lache@ngi.de
Tel.:
+0491759610756

------
Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com