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Ok, so the errors you're seeing are because of the differences in the directives, labels etc used between armasm and gas. All the opcodes should be ok, but you'll need to look at the lines that are failing, understand what the sdt directives are doing and replace them with a gas equivalent. For example, in the first error, the AREA directive will need to be replaced by a .section directive. The parameters are different so you'll need to look at the gas documentation (>info gas). I don't know of any ready done stuff, but then I've never used this board so I wouldn't expect to. HTH Clive > -----Original Message----- > From: Daniel.Andersson@combitechsystems.com > [mailto:Daniel.Andersson@combitechsystems.com] > Sent: 28 March 2001 09:37 > To: Clive Davies > Cc: crossgcc@sourceware.cygnus.com > Subject: RE: Difference in assemble language > > > Hi, > > Below is three things. First the part of the makefiles that > handles the .s > file. Second is the error that i get when i try to assemble > the file. Third > is the actual file, the cstartup_angel.s > > I think that i have two ways to go. One is to correct the > cstartup_angel.s > file so that i can be use together with gcc. The other way is > to find a file > that does the same thing but is meant to work with the GNU tools. Does > anyone know were to find such a project? > > Regards, > > /Daniel > > > > Part of MAKEFILE: > ---------------- > %.o: %.S > $(XCC) -c -o $*.o $(CFLAGS) $(EXTRACFLAGS) $< > ---------------- > > Here comes the error output from the assembler. > > ------------------ > bash.exe-2.04$ make > as -o cstartup_angel.o cstartup_angel.s > cstartup_angel.s: Assembler messages: > cstartup_angel.s:16: Error: no such instruction: `area > reset,CODE,READONLY,INTERWORK' > cstartup_angel.s:18: Error: no such instruction: `include > targets/eb40/eb40.inc' > cstartup_angel.s:21: Error: invalid character '_' in mnemonic > cstartup_angel.s:21: Error: Rest of line ignored. First > ignored character is > `3'. > cstartup_angel.s:22: Error: invalid character '_' in mnemonic > cstartup_angel.s:22: Error: Rest of line ignored. First > ignored character is > `3'. > cstartup_angel.s:23: Error: invalid character '_' in mnemonic > cstartup_angel.s:23: Error: Rest of line ignored. First > ignored character is > `3'. > cstartup_angel.s:24: Error: invalid character '_' in mnemonic > cstartup_angel.s:24: Error: Rest of line ignored. First > ignored character is > `3'. > cstartup_angel.s:25: Error: invalid character '_' in mnemonic > cstartup_angel.s:25: Error: Rest of line ignored. First > ignored character is > `4'. > cstartup_angel.s:27: Error: no such instruction: `import main' > cstartup_angel.s:29: Error: no such instruction: `import > |Image$$RO$$Limit|' > cstartup_angel.s:29: Error: no such instruction: `end of ROM > code (=start of > ROM data)' > cstartup_angel.s:30: Error: no such instruction: `import > |Image$$RW$$Base|' > cstartup_angel.s:30: Error: no such instruction: `base of RAM > to initialise' > cstartup_angel.s:31: Error: no such instruction: `import > |Image$$ZI$$Base|' > cstartup_angel.s:31: Error: no such instruction: `base and > limit of area' > cstartup_angel.s:32: Error: no such instruction: `import > |Image$$ZI$$Limit|' > cstartup_angel.s:32: Error: no such instruction: `to zero initialise' > cstartup_angel.s:34: Error: no such instruction: `import __entry' > cstartup_angel.s:34: Error: no such instruction: `semihosting > Entry point' > cstartup_angel.s:37: Error: no such instruction: `export __main' > cstartup_angel.s:38: Error: invalid character '_' in mnemonic > cstartup_angel.s:42: Error: no such instruction: `entry ' > cstartup_angel.s:45: Error: no such instruction: `rstvec ' > cstartup_angel.s:46: Error: no such instruction: `b InitReset' > cstartup_angel.s:46: Error: no such instruction: `reset ' > cstartup_angel.s:47: Error: no such instruction: `undefvec ' > cstartup_angel.s:48: Error: no such instruction: `b undefvec' > cstartup_angel.s:48: Error: no such instruction: `undefined > Instruction' > cstartup_angel.s:49: Error: no such instruction: `swivec ' > cstartup_angel.s:50: Error: no such instruction: `b swivec' > cstartup_angel.s:50: Error: no such instruction: `software Interrupt' > cstartup_angel.s:51: Error: no such instruction: `pabtvec ' > cstartup_angel.s:52: Error: no such instruction: `b pabtvec' > cstartup_angel.s:53: Error: no such instruction: `dabtvec ' > cstartup_angel.s:54: Error: no such instruction: `b dabtvec' > cstartup_angel.s:54: Error: no such instruction: `data Abort' > cstartup_angel.s:55: Error: no such instruction: `rsvdvec ' > cstartup_angel.s:56: Error: no such instruction: `b rsvdvec' > cstartup_angel.s:56: Error: no such instruction: `reserved ' > cstartup_angel.s:57: Error: no such instruction: `irqvec ' > cstartup_angel.s:58: Error: no such instruction: `ldr pc,[pc,' > cstartup_angel.s:59: Error: no such instruction: `fiqvec ' > cstartup_angel.s:60: Error: no such instruction: `ldr pc,[pc,' > cstartup_angel.s:65: Error: no such instruction: `inittableebi ' > cstartup_angel.s:66: Error: no such instruction: `dcd 0x01002529' > cstartup_angel.s:66: Error: Rest of line ignored. First > ignored character is > `0'. > cstartup_angel.s:67: Error: no such instruction: `dcd 0x02002121' > cstartup_angel.s:67: Error: Rest of line ignored. First > ignored character is > `0'. > cstartup_angel.s:68: Error: no such instruction: `dcd 0x20000000' > cstartup_angel.s:68: Error: no such instruction: `unused ' > cstartup_angel.s:69: Error: no such instruction: `dcd 0x30000000' > cstartup_angel.s:69: Error: no such instruction: `unused ' > cstartup_angel.s:70: Error: no such instruction: `dcd 0x40000000' > cstartup_angel.s:70: Error: no such instruction: `unused ' > cstartup_angel.s:71: Error: no such instruction: `dcd 0x50000000' > cstartup_angel.s:71: Error: no such instruction: `unused ' > cstartup_angel.s:72: Error: no such instruction: `dcd 0x60000000' > cstartup_angel.s:72: Error: no such instruction: `unused ' > cstartup_angel.s:73: Error: no such instruction: `dcd 0x70000000' > cstartup_angel.s:73: Error: no such instruction: `unused ' > cstartup_angel.s:74: Error: no such instruction: `dcd 0x00000001' > cstartup_angel.s:74: Error: no such instruction: `remap command' > cstartup_angel.s:75: Error: no such instruction: `dcd 0x00000006' > cstartup_angel.s:75: Error: Rest of line ignored. First > ignored character is > `6'. > cstartup_angel.s:77: Error: no such instruction: `dcd EBI_BASE' > cstartup_angel.s:77: Error: no such instruction: `ebi Base Address' > cstartup_angel.s:78: Error: no such instruction: `initreset ' > cstartup_angel.s:82: Error: no such instruction: `ldr > r10,PtInitTableEBI' > cstartup_angel.s:82: Error: no such instruction: `get the > address of the > chip select register image' > cstartup_angel.s:85: Error: too many memory references for `movs' > cstartup_angel.s:87: Error: no such instruction: `moveq r10,r10,LSL' > cstartup_angel.s:88: Error: no such instruction: `moveq r10,r10,LSR' > cstartup_angel.s:92: Error: no such instruction: `ldr r12,PtInitRemap' > cstartup_angel.s:92: Error: no such instruction: `get the > real jump address > ( after remap)' > cstartup_angel.s:95: Error: no such instruction: `ldmia > r10!,{r0-r9,r11}' > cstartup_angel.s:95: Error: no such instruction: `load the > complete image > and the EBI base' > cstartup_angel.s:96: Error: no such instruction: `stmia r11!,{r0-r9}' > cstartup_angel.s:96: Error: no such instruction: `store the > complete image > with the remap command' > cstartup_angel.s:99: Error: too many memory references for `mov' > cstartup_angel.s:99: Error: no such instruction: `jump and break the > pipeline' > cstartup_angel.s:101: Error: no such instruction: `ptinittableebi ' > cstartup_angel.s:102: Error: no such instruction: `dcd InitTableEBI' > cstartup_angel.s:102: Error: no such instruction: `table for EBI > initialization' > cstartup_angel.s:103: Error: no such instruction: `ptinitremap ' > cstartup_angel.s:104: Error: no such instruction: `dcd InitRemap' > cstartup_angel.s:104: Error: no such instruction: `address > where to jump > after REMAP' > cstartup_angel.s:105: Error: no such instruction: `ptinitvector ' > cstartup_angel.s:106: Error: no such instruction: `dcd rstvec' > cstartup_angel.s:106: Error: no such instruction: `table for vector > initialization' > cstartup_angel.s:108: Error: no such instruction: `initremap ' > cstartup_angel.s:112: Error: expecting operand after ','; got nothing > cstartup_angel.s:113: Error: no such instruction: `msr CPSR_c,r1' > cstartup_angel.s:114: Error: no such instruction: `ldr r13,=RAM_LIMIT' > cstartup_angel.s:115: Error: too many memory references for `mov' > cstartup_angel.s:116: Error: too many memory references for `sub' > cstartup_angel.s:119: Error: expecting operand after ','; got nothing > cstartup_angel.s:120: Error: no such instruction: `msr CPSR_c,r1' > cstartup_angel.s:121: Error: too many memory references for `mov' > cstartup_angel.s:122: Error: too many memory references for `sub' > cstartup_angel.s:125: Error: expecting operand after ','; got nothing > cstartup_angel.s:126: Error: no such instruction: `msr CPSR_c,r1' > cstartup_angel.s:127: Error: too many memory references for `mov' > cstartup_angel.s:128: Error: too many memory references for `sub' > cstartup_angel.s:131: Error: expecting operand after ','; got nothing > cstartup_angel.s:132: Error: no such instruction: `msr CPSR_c,r1' > cstartup_angel.s:133: Error: too many memory references for `mov' > cstartup_angel.s:134: Error: too many memory references for `sub' > cstartup_angel.s:137: Error: expecting operand after ','; got nothing > cstartup_angel.s:138: Error: no such instruction: `msr cpsr_c,r0' > cstartup_angel.s:139: Error: no such instruction: `ldr > r13,=EXT_SRAM_LIMIT' > cstartup_angel.s:140: Error: too many memory references for `sub' > cstartup_angel.s:144: Error: expecting operand after ','; got nothing > cstartup_angel.s:145: Error: no such instruction: `msr cpsr_c,r0' > cstartup_angel.s:146: Error: too many memory references for `mov' > cstartup_angel.s:156: Error: no such instruction: `ldr > r0,=|Image$$RO$$Limit|' > cstartup_angel.s:156: Error: no such instruction: `get > pointer to ROM data' > cstartup_angel.s:157: Error: no such instruction: `ldr > r1,=|Image$$RW$$Base|' > cstartup_angel.s:157: Error: ignoring junk `copy' after expression > cstartup_angel.s:157: Error: suffix or operands invalid for `and' > cstartup_angel.s:158: Error: no such instruction: `ldr > r3,=|Image$$ZI$$Base|' > cstartup_angel.s:158: Error: no such instruction: `zero init > base=>top of > initialised data' > cstartup_angel.s:159: Error: too many memory references for `cmp' > cstartup_angel.s:159: Error: no such instruction: `check that they are > different' > cstartup_angel.s:160: Error: no such instruction: `beq NoRW' > cstartup_angel.s:161: Error: no such instruction: `looprw cmp r1,r3' > cstartup_angel.s:161: Error: no such instruction: `copy init data' > cstartup_angel.s:162: Error: no such instruction: `ldrcc r2,[r0],' > cstartup_angel.s:163: Error: no such instruction: `strcc r2,[r1],' > cstartup_angel.s:164: Error: no such instruction: `bcc LoopRw' > cstartup_angel.s:165: Error: no such instruction: `norw ldr > r1,=|Image$$ZI$$Limit|' > cstartup_angel.s:165: Error: no such instruction: `top of > zero init segment' > cstartup_angel.s:166: Error: expecting operand after ','; got nothing > cstartup_angel.s:167: Error: no such instruction: `loopzi cmp r3,r1' > cstartup_angel.s:167: Error: no such instruction: `zero init' > cstartup_angel.s:168: Error: no such instruction: `strcc r2,[r3],' > cstartup_angel.s:169: Error: no such instruction: `bcc LoopZI' > cstartup_angel.s:174: Error: no such instruction: `b __entry' > cstartup_angel.s:176: Error: no such instruction: `end ' > make: *** [cstartup_angel.o] Error 1 > bash.exe-2.04$ > > > > And here is the file that i am trying to assemble: > > > -------------------------------- > > /*;----------------------------------------------------------- > -------------- > -----*/ > /*;- ATMEL Microcontroller Software Support - ROUSSET - > */ > /*;----------------------------------------------------------- > -------------- > -----*/ > /*; The software is delivered "AS IS" without warranty or > condition of any > */ > /*; kind, either express, implied or statutory. This includes without > */ > /*; limitation any warranty or condition with respect to > merchantability or > */ > /*; fitness for any particular purpose, or against the > infringements of > */ > /*; intellectual property rights of others. > */ > /*;----------------------------------------------------------- > -------------- > ----*/ > /*;- File source : cstartup_angel.s > */ > /*;- Object : Boot of the r40807 Evaluation Board > */ > /*;- > */ > /*;- 1.0 06/04/00 JPP : Creation > */ > /*;----------------------------------------------------------- > -------------- > -----*/ > > AREA reset, CODE, READONLY, INTERWORK > > INCLUDE targets/eb40/eb40.inc > > /*;- Stack Sizes Definition*/ > IRQ_STACK_SIZE EQU (3*8*4) ; 3 words per > interrupt priority > level > FIQ_STACK_SIZE EQU (3*4) ; 3 word > ABT_STACK_SIZE EQU (3*4) ; 3 word > UND_STACK_SIZE EQU (3*4) ; 3 words > SYS_STACK_SIZE EQU (4*1024) ; 4Kbytes > > IMPORT main > > IMPORT |Image$$RO$$Limit| ; End of ROM > code (=start of > ROM data) > IMPORT |Image$$RW$$Base| ; Base of RAM > to initialise > IMPORT |Image$$ZI$$Base| ; Base and > limit of area > IMPORT |Image$$ZI$$Limit| ; to zero initialise > > IMPORT __entry ; Semihosting > Entry point > > /*;- Define "__main" to ensure that C runtime system is not linked*/ > EXPORT __main > __main > > /*;----------------------------------------------------------- > -------------- > -----*/ > /*;- Define the entry point*/ > ENTRY > /*;- Exception vectors*/ > /*;- -----------------*/ > rstvec > B InitReset ; reset > undefvec > B undefvec ; Undefined Instruction > swivec > B swivec ; Software Interrupt > pabtvec > B pabtvec ; Prefetch Abort > dabtvec > B dabtvec ; Data Abort > rsvdvec > B rsvdvec ; reserved > irqvec > ldr pc, [pc,#-0xF20] ; IRQ : > read the AIC > fiqvec > ldr pc, [pc,#-0xF20] ; FIQ : > read the AIC > > /*;- EBI Initialization Data*/ > /*;-------------------------*/ > /*; 32,768MHz master clock assumed*/ > InitTableEBI > DCD 0x01002529 ; 0x01000000, 16MB, 2 > tdf, 16 bits, 2 WS > DCD 0x02002121 ; 0x02000000, 16MB, 0 > hold, 16 bits, 1 > WS > DCD 0x20000000 ; unused > DCD 0x30000000 ; unused > DCD 0x40000000 ; unused > DCD 0x50000000 ; unused > DCD 0x60000000 ; unused > DCD 0x70000000 ; unused > DCD 0x00000001 ; REMAP command > DCD 0x00000006 ; 6 memory regions, standard read > > DCD EBI_BASE ; EBI Base Address > InitReset > /*;- Initialise the Memory Controller*/ > /*;----------------------------------*/ > /*;- | Copy the Image of the Memory Controller*/ > ldr r10, PtInitTableEBI ; get the > address of the > chip select register image > > /*;- | If pc > 0x100000*/ > movs r0, pc, LSR #20 > /*;- | | Mask the 12 highest bits of the address*/ > moveq r10, r10, LSL #12 > moveq r10, r10, LSR #12 > /*;- | EndIf*/ > > /*;- | Load the address where to jump*/ > ldr r12, PtInitRemap ; get the > real jump > address ( after remap ) > > /*;- | Copy Chip Select Register Image to Memory Controller > and command > remap*/ > ldmia r10!, {r0-r9,r11} ; load > the complete > image and the EBI base > stmia r11!, {r0-r9} ; store > the complete > image with the remap command > > /*;- | Jump to ROM at its new address*/ > mov pc, r12 ; jump > and break the > pipeline > > PtInitTableEBI > DCD InitTableEBI ; Table for EBI > initialization > PtInitRemap > DCD InitRemap ; address > where to jump > after REMAP > PtInitVector > DCD rstvec ; Table for vector > initialization > > InitRemap > /*;- Setup the stack for each mode*/ > /*;-------------------------------*/ > /*;- | Set up Fast Interrupt mode and set FIQ stack*/ > mov r1, #ARM_MODE_FIQ:OR:I_BIT:OR:F_BIT > msr CPSR_c, r1 > ldr r13, =RAM_LIMIT > mov r0, r13 > sub r0, r0, #FIQ_STACK_SIZE > > /*;- | Set up Interrupt mode and set IRQ stack*/ > mov r1, #ARM_MODE_IRQ:OR:I_BIT:OR:F_BIT > msr CPSR_c, r1 > mov r13, r0 > sub r0, r0, #IRQ_STACK_SIZE > > /*;- | Set up Abort mode and set Abort stack*/ > mov r1, #ARM_MODE_ABORT:OR:I_BIT:OR:F_BIT > msr CPSR_c, r1 > mov r13, r0 > sub r0, r0, #ABT_STACK_SIZE > > /*;- | Set up Interrupt mode and set undefine stack*/ > mov r1, #ARM_MODE_UNDEF:OR:I_BIT:OR:F_BIT > msr CPSR_c, r1 > mov r13, r0 > sub r0, r0, #UND_STACK_SIZE > > /*;- | Set up the User/system mode and stack pointer on the top of the > external RAM*/ > mov r0, #ARM_MODE_SYS:OR:I_BIT:OR:F_BIT ; No > interrupts > msr cpsr_c, r0 > ldr r13, =EXT_SRAM_LIMIT > sub r4, r13, #SYS_STACK_SIZE > > /*;- Setup Application Operating Mode and Enable the interrupts*/ > /*;- ----------------------------------------------------------*/ > mov r0, #ARM_MODE_USER > msr cpsr_c, r0 > mov r13, r4 > > /*;- Diasable peripherial clock USART0 must be set for angel*/ > /*;---------------------------------------------------------- > mov > r0,#(0xffffffff:AND:(:NOT:(0x01:SHL:US0_ID))) > ldr r1,=PS_BASE > str r0,[r1, #PS_PCDR] > > /*;- Initialise C variables*/ > /*;- ----------------------*/ > ldr r0, =|Image$$RO$$Limit| ; Get > pointer to ROM > data > ldr r1, =|Image$$RW$$Base| ; and RAM copy > ldr r3, =|Image$$ZI$$Base| ; Zero > init base => top > of initialised data > cmp r0, r1 ; Check > that they are > different > beq NoRW > LoopRw cmp r1, r3 ; Copy init data > ldrcc r2, [r0], #4 > strcc r2, [r1], #4 > bcc LoopRw > NoRW ldr r1, =|Image$$ZI$$Limit| ; Top of zero init > segment > mov r2, #0 > LoopZI cmp r3, r1 ; Zero init > strcc r2, [r3], #4 > bcc LoopZI > > /*;- Branch on Entry point*/ > /*;- ---------------------*/ > /*;- Allows semihosting initialisation*/ > b __entry > > END > > > > > > > > > > > > > > > > > > -----Original Message----- > From: Clive Davies [mailto:cdavies@altera.com] > Sent: den 28 mars 2001 10:11 > To: Andersson Daniel > Cc: crossgcc@sourceware.cygnus.com > Subject: RE: Difference in assemble language > > > > > > but i seems like the assemler language isn't the same for ARM > > and gcc. When > > i assemble cstartup_angel.s i get very much "No such > > instruction"-comments > > from the assembler. > > > > The assembly language is the same, but there are differences > in the way that > thing like labels and assembler directives are specified. If > you send the > error messages and the lines that cause the problem (or at least some > examples) it will be easier to suggest what the problem might be. > > Clive > ------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
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