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Alex Holland wrote: > Several years ago, I had major grief linking an image for a powerpc-eabi > target. > Any modification whatsoever to > locate my code where I need it fails - vector table at the start of the RAM > address space = 0x000000, remaining text, data, bss, contiguously located > afterwards. Seems like an easy case, but it does not generate the code > properly. > Does anyone have any suggestions for the magic required to rid me of this > nightmare or an example of a working powerpc-eabi linker script that allows > you to specify where you want sections. See below the script for for an application based on the ABCD Proto-Kernel(tm), which uses fineer grained control over what is loaded where (perhaps with unessential redundancy in the specifications details). Good luck. -- - Thierry Moreau CONNOTECH Experts-conseils inc. 9130 Place de Montgolfier Montreal, Qc H2M 2A1 Tel.: (514)385-5691 Fax: (514)385-5900 e-mail: thierry.moreau@connotech.com ========================================================== /* GNU ld linker script for the PPCMB/850, RAM-based loading Copyright (C) 2003 CONNOTECH Experts-conseils inc. Written by Thierry Moreau (e-mail:thierry.moreau@connotech.com) . . . . . . . . . . . . . . . . . . . . . . . . . . . Note: The present legal notice is based on the GNU LGPL (Lesser General Public License) with a Waiver on the Opportunity to Relink. . . . . . . . . . . . . . . . . . . . . . . . . . . . This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License version 2.1 as published by the Free Software Foundation, except for its preamble and clause 6 that are modified as stated herein: A) DELETE from the preamble fifth paragraph the sentence that reads ``If you link other code with the library, you must provide complete object files to the recipients, so that they can relink them with the library after making changes to the library and recompiling it.'' B) DELETE the preamble before last paragraph that reads ``Although the Lesser General Public License is Less protective of the users' freedom, it does ensure that the user of a program that is linked with the Library has the freedom and the wherewithal to run that program using a modified version of the Library.'' C) At the end of the first paragraph of clause 6, REPLACE the phrase ``, provided that the terms permit modification ... ... debugging such modifications.'' by the following phrase ``, provided that the provisions of the following paragraph are followed.'' D) At the end of the text in the bullet a) in clause 6, DELETE the phrase ``; and, if the work is an executable linked with ... ... use the modified definitions.)'' E) DELETE the complete paragraph after the bullet e) in clause 6, this paragraph reading ``For an executable, the required form ... ... itself accompanies the executable.'' These modifications do not however invalidate any other reasons why derived work might be covered by the exact GNU Lesser General Public License. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License version 2.1 for more details. You should have received a copy of the GNU Lesser General Public License version 2.1 along with this library; if not, you may write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. HOW TO CONTACT THE COPYRIGHT HOLDER: CONNOTECH Experts-conseils inc. home page: http://www.connotech.com e-mail to: info@connotech.com mailing address: 9130 Place de Montgolfier, Montreal, Quebec, Canada, H2M 2A1. -------------------------------------------------------------------------------- Send bug reports to the above address. */ OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc") TARGET(elf32-powerpc) IMMR_BASE_ADDRESS =ABSOLUTE(0xF8010000); PHDRS { /* name type [ FILEHDR ] [ PHDRS ] [ AT ( address ) ] [ FLAGS ( flags ) ] ; */ abcd_target_indep_sect PT_LOAD ; /* AT ( 0x120 ) ; Target-independent variables */ mpc8xx_Machine_Check PT_LOAD ; /* AT ( 0x200 ) ; Machine Check Exception */ mpc8xx_External PT_LOAD ; /* AT ( 0x500 ) ; External Exception */ mpc8xx_Alignment PT_LOAD ; /* AT ( 0x600 ) ; Alignment Exception */ mpc8xx_Program PT_LOAD ; /* AT ( 0x700 ) ; Program Exception */ mpc8xx_Decrementer PT_LOAD ; /* AT ( 0x900 ) ; Decrementer Exception */ mpc8xx_System_Call PT_LOAD ; /* AT ( 0xC00 ) ; System Call Exception */ mpc8xx_Trace PT_LOAD ; /* AT ( 0xD00 ) ; Trace Exception */ mpc8xx_Software_Emulation PT_LOAD ; /* AT ( 0x1000 ) ; Implementation-Dependent Software Emulation Exception */ mpc8xx_I_TLB_Miss PT_LOAD ; /* AT ( 0x1100 ) ; Implementation-Dependent Instruction TLB Miss Exception */ mpc8xx_D_TLB_Miss PT_LOAD ; /* AT ( 0x1200 ) ; Implementation-Dependent Data TLB Miss Exception */ mpc8xx_I_TLB_Error PT_LOAD ; /* AT ( 0x1300 ) ; Implementation-Dependent Instruction TLB Error Exception */ mpc8xx_D_TLB_Error PT_LOAD ; /* AT ( 0x1400 ) ; Implementation-Dependent Data TLB Error Exception */ besides_bss PT_LOAD ; /* AT ( 0x1500 ) ; 0x700 bytes allocated to the CRC computation tables */ mpc8xx_Data_Breakpoint PT_LOAD ; /* AT ( 0x1C00 ) ; Implementation-Dependent Data Breakpoint Exception */ mpc8xx_Instr_Breakpoint PT_LOAD ; /* AT ( 0x1D00 ) ; Implementation-Dependent Instruction Breakpoint Exception */ mpc8xx_Periph_Breakpoint PT_LOAD ; /* AT ( 0x1E00 ) ; Implementation-Dependent Peripheral Breakpoint Exception */ mpc8xx_Nonmask_Dev_Port PT_LOAD ; /* AT ( 0x1F00 ) ; Implementation-Dependent Nonmaskable Development Port Exception */ sram_memory_init PT_LOAD ; flash_segments_desc PT_LOAD ; sram_memory_no_init PT_LOAD ; task_local_data PT_LOAD ; abcd_post_ld_info_1 PT_NOTE ; mpc850_internal_memory PT_LOAD ; mpc850_inexistent_memory PT_LOAD ; } SECTIONS { /****************************************/ /* Load image sections in the RAM. */ . = 0x120; /* Target-independent variables */ .abcd_target_indep_sect : { *abcd_target_indep_vars.o(.bss) . = ALIGN(4); } :abcd_target_indep_sect . = 0x200; /* Machine Check Exception */ .mpc8xx_Machine_Check : { *(.mpc8xx_Machine_Check) . = ALIGN(4); } :mpc8xx_Machine_Check . = 0x500; /* External Exception */ .mpc8xx_External : { *(.mpc8xx_External) . = ALIGN(4); } :mpc8xx_External . = 0x600; /* Alignment Exception */ .mpc8xx_Alignment : { *(.mpc8xx_Alignment) . = ALIGN(4); } :mpc8xx_Alignment . = 0x700; /* Program Exception */ .mpc8xx_Program : { *(.mpc8xx_Program) . = ALIGN(4); } :mpc8xx_Program . = 0x900; /* Decrementer Exception */ .mpc8xx_Decrementer : { *(.mpc8xx_Decrementer) . = ALIGN(4); } :mpc8xx_Decrementer . = 0xC00; /* System Call Exception */ .mpc8xx_System_Call : { *(.mpc8xx_System_Call) . = ALIGN(4); } :mpc8xx_System_Call . = 0xD00; /* Trace Exception */ .mpc8xx_Trace : { *(.mpc8xx_Trace) . = ALIGN(4); } :mpc8xx_Trace . = 0x1000; /* Implementation-Dependent Software Emulation Exception */ .mpc8xx_Software_Emulation : { *(.mpc8xx_Software_Emulation) . = ALIGN(4); } :mpc8xx_Software_Emulation . = 0x1100; /* Implementation-Dependent Instruction TLB Miss Exception */ .mpc8xx_I_TLB_Miss : { *(.mpc8xx_I_TLB_Miss) . = ALIGN(4); } :mpc8xx_I_TLB_Miss . = 0x1200; /* Implementation-Dependent Data TLB Miss Exception */ .mpc8xx_D_TLB_Miss : { *(.mpc8xx_D_TLB_Miss) . = ALIGN(4); } :mpc8xx_D_TLB_Miss . = 0x1300; /* Implementation-Dependent Instruction TLB Error Exception */ .mpc8xx_I_TLB_Error : { *(.mpc8xx_I_TLB_Error) . = ALIGN(4); } :mpc8xx_I_TLB_Error . = 0x1400; /* Implementation-Dependent Data TLB Error Exception */ .mpc8xx_D_TLB_Error : { *(.mpc8xx_D_TLB_Error) . = ALIGN(4); } :mpc8xx_D_TLB_Error . = 0x1500; /* 0x700 bytes allocated to the CRC computation tables */ .besides_bss : { *abcd_besides_bss.o(.bss) . = ALIGN(4); } :besides_bss . = 0x1C00; /* Implementation-Dependent Data Breakpoint Exception */ .mpc8xx_Data_Breakpoint : { *(.mpc8xx_Data_Breakpoint) . = ALIGN(4); } :mpc8xx_Data_Breakpoint . = 0x1D00; /* Implementation-Dependent Instruction Breakpoint Exception */ .mpc8xx_Instr_Breakpoint : { *(.mpc8xx_Instr_Breakpoint) . = ALIGN(4); } :mpc8xx_Instr_Breakpoint . = 0x1E00; /* Implementation-Dependent Peripheral Breakpoint Exception */ .mpc8xx_Periph_Breakpoint : { *(.mpc8xx_Periph_Breakpoint) . = ALIGN(4); } :mpc8xx_Periph_Breakpoint . = 0x1F00; /* Implementation-Dependent Nonmaskable Development Port Exception */ .mpc8xx_Nonmask_Dev_Port : { *(.mpc8xx_Nonmask_Dev_Port) . = ALIGN(4); } :mpc8xx_Nonmask_Dev_Port /* Read-only sections, merged into text segment: */ . = 0x2000; .reset_follow_up : { LONG(start_of_flash_segments_desc) LONG(nb_flash_segments_desc) *(.reset_follow_up) . = ALIGN(4); } :sram_memory_init .interp : { *(.interp) . = ALIGN(4); } :sram_memory_init .hash : { *(.hash) . = ALIGN(4); } :sram_memory_init .dynsym : { *(.dynsym) . = ALIGN(4); } :sram_memory_init .dynstr : { *(.dynstr) . = ALIGN(4); } :sram_memory_init .gnu.version : { *(.gnu.version) . = ALIGN(4); } :sram_memory_init .gnu.version_d : { *(.gnu.version_d) . = ALIGN(4); } :sram_memory_init .gnu.version_r : { *(.gnu.version_r) . = ALIGN(4); } :sram_memory_init .rel.init : { *(.rel.init) . = ALIGN(4); } :sram_memory_init .rela.init : { *(.rela.init) . = ALIGN(4); } :sram_memory_init .rel.text : { *(.rel.text) . = ALIGN(4); } :sram_memory_init .rela.text : { *(.rela.text) . = ALIGN(4); } :sram_memory_init .rel.fini : { *(.rel.fini) . = ALIGN(4); } :sram_memory_init .rela.fini : { *(.rela.fini) . = ALIGN(4); } :sram_memory_init .rel.rodata : { *(.rel.rodata) . = ALIGN(4); } :sram_memory_init .rela.rodata : { *(.rela.rodata) . = ALIGN(4); } :sram_memory_init .rel.data : { *(.rel.data) . = ALIGN(4); } :sram_memory_init .rela.data : { *(.rela.data) . = ALIGN(4); } :sram_memory_init .rel.tdata : { *(.rel.tdata) . = ALIGN(4); } :sram_memory_init .rela.tdata : { *(.rela.tdata) . = ALIGN(4); } :sram_memory_init .rel.tbss : { *(.rel.tbss) . = ALIGN(4); } :sram_memory_init .rela.tbss : { *(.rela.tbss) . = ALIGN(4); } :sram_memory_init .rel.ctors : { *(.rel.ctors) . = ALIGN(4); } :sram_memory_init .rela.ctors : { *(.rela.ctors) . = ALIGN(4); } :sram_memory_init .rel.dtors : { *(.rel.dtors) . = ALIGN(4); } :sram_memory_init .rela.dtors : { *(.rela.dtors) . = ALIGN(4); } :sram_memory_init .rel.got : { *(.rel.got) . = ALIGN(4); } :sram_memory_init .rela.got : { *(.rela.got) . = ALIGN(4); } :sram_memory_init .rel.sdata : { *(.rel.sdata) . = ALIGN(4); } :sram_memory_init .rela.sdata : { *(.rela.sdata) . = ALIGN(4); } :sram_memory_init .rel.sbss : { *(.rel.sbss) . = ALIGN(4); } :sram_memory_init .rela.sbss : { *(.rela.sbss) . = ALIGN(4); } :sram_memory_init .rel.sdata2 : { *(.rel.sdata2) . = ALIGN(4); } :sram_memory_init .rela.sdata2 : { *(.rela.sdata2) . = ALIGN(4); } :sram_memory_init .rel.sbss2 : { *(.rel.sbss2) . = ALIGN(4); } :sram_memory_init .rela.sbss2 : { *(.rela.sbss2) . = ALIGN(4); } :sram_memory_init .rel.bss : { *(.rel.bss) . = ALIGN(4); } :sram_memory_init .rela.bss : { *(.rela.bss) . = ALIGN(4); } :sram_memory_init .rel.plt : { *(.rel.plt) . = ALIGN(4); } :sram_memory_init .rela.plt : { *(.rela.plt) . = ALIGN(4); } :sram_memory_init .text : { *(.text .flash_text .stub .text.* .gnu.linkonce.t.*) /* .gnu.warning sections are handled specially by elf32.em. */ *(.gnu.warning) . = ALIGN(4); } :sram_memory_init .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) . = ALIGN(4); } :sram_memory_init .rodata1 : { *(.rodata1) . = ALIGN(4); } :sram_memory_init .eh_frame : { KEEP (*(.eh_frame)) . = ALIGN(4); } :sram_memory_init .eh_frame_hdr : { *(.eh_frame_hdr) . = ALIGN(4); } :sram_memory_init /* Ensure the __preinit_array_start label is properly aligned. We could instead move the label definition inside the section, but the linker would then create the section even if it turns out to be empty, which isn't pretty. */ .preinit_array : { *(.preinit_array) . = ALIGN(4); } :sram_memory_init .init_array : { *(.init_array) . = ALIGN(4); } :sram_memory_init .fini_array : { *(.fini_array) . = ALIGN(4); } :sram_memory_init .data : { *(.data) . = ALIGN(4); } :sram_memory_init .data1 : { *(.data1) . = ALIGN(4); } :sram_memory_init .tdata : { *(.tdata) . = ALIGN(4); } :sram_memory_init PROVIDE (__CTOR_LIST__ = .); .ctors : { LONG(0) KEEP (*abcd_early_ctors.o(.ctors)) KEEP (*(EXCLUDE_FILE (*abcd_early_ctors.o ) .ctors)) LONG(0) . = ALIGN(4); } :sram_memory_init .gcc_except_table : { *(.gcc_except_table) . = ALIGN(4); } :sram_memory_init .fixup : { *(.fixup) . = ALIGN(4); } :sram_memory_init .got1 : { *(.got1) . = ALIGN(4); } :sram_memory_init .got2 : { *(.got2) . = ALIGN(4); } :sram_memory_init .dynamic : { *(.dynamic) . = ALIGN(4); } :sram_memory_init .jcr : { KEEP (*(.jcr)) . = ALIGN(4); } :sram_memory_init .got : { *(.got.plt) *(.got) . = ALIGN(4); } :sram_memory_init _end = . ; PROVIDE (end = .); /****************************************/ /* Space reserved in the flash for the code checksums and RAM-to-exception-vectors copy control information. */ start_of_flash_segments_desc = ( . + 3 ) & ~ 3 ; .flash_segments_desc (NOLOAD) : { *(.flash_segments_desc) } :flash_segments_desc end_of_flash_segments_desc = . ; nb_flash_segments_desc = ( ( . - start_of_flash_segments_desc ) / 16 ) ; /****************************************/ /* Uninitialized variables in the RAM memory. */ PROVIDE (start_unitialized_data = .); .tbss : { *(.tbss) . = ALIGN(4); } :sram_memory_no_init .bss : { *(EXCLUDE_FILE (*abcd_besides_bss.o) .bss) . = ALIGN(4); PROVIDE (end_unitialized_data = .); /* - - - - - - - - - - - - - - - - - - - */ /* *abcd_besides_bss.o(.bss) . = ALIGN(4); */ /* - - - - - - - - - - - - - - - - - - - */ PROVIDE (start_heap_data = .); } :sram_memory_no_init /****************************************/ /* The heap section comes here. */ /****************************************/ /* The kernel context stack area comes here, at the top of SRAM memory. */ /****************************************/ /* Load image sections for which the virtual address is totally irrelevant for execution. */ . = 0xAB058000 ; start_of_task_local_data = ( . + 3 ) & ~ 3 ; .sdata2 : { *(.sdata2) } :task_local_data .sbss2 : { *(.sbss2) } :task_local_data .abcd_post_ld_info_1 (INFO) : { *(.abcd_post_ld_info_1) } :abcd_post_ld_info_1 /****************************************/ /* Load image sections for perpherals */ . = 0xF8008000 ; .sdata : { *(.sdata) } :mpc850_internal_memory .sbss : { KEEP(*(EXCLUDE_FILE (*immr_dpram0.o *immr_dpram0_filler.o *immr_dpram1.o *immr_dpram1_filler.o *immr_param_ram.o ) .sbss)) KEEP (*immr_dpram0.o(.sbss)) KEEP (*immr_dpram0_filler.o(.sbss)) KEEP (*immr_dpram1.o(.sbss)) KEEP (*immr_dpram1_filler.o(.sbss)) KEEP (*immr_param_ram.o(.sbss)) } :mpc850_internal_memory /****************************************/ /* Special section for explicit access to non-existent memory */ . = 0xF8028000 ; .mpc850_inexistent_memory : { *(.mpc850_inexistent_memory) } : mpc850_inexistent_memory mpc850_inexistent_memory_array = . ; } ==================================================== END ------ Want more information? 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