This is the mail archive of the crossgcc@sources.redhat.com mailing list for the crossgcc project.

See the CrossGCC FAQ for lots more information.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: ARM and interrupts


[ ... ]



The book is good, but it isn't cheap. But hey, lack of knowledge on these details is even more expensive!

We also found some example code for a test board from Motorola (we're actually using a Motorola CPU with ARM core), and it turns out that they also have an "Interrupt Controler" application note that's quite helpful (unlike the CPU reference manual, I might add..)



Yes, I was going to mention something related to that. With the "advanced/vectored interrupt controllers" that are all the rage now, there are some nifty tricks you can use to really boost interrupt handling performance. I have examples, but if there are some in your manuals then go with them.

BTW, have you written interrupt handlers in C? I'm unsure how to set the functions to make them return the correct way etc., or if that's even possible with gcc. The example code uses the __irq keyword (as in "void __irq FIQ_Handler(void)") to do it, but this doesn't work with gcc, I think.




b.g.


- Toralf


------
Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]