Re: More ARM binutils fuckage

[Lennert Buytenhek <buytenh at wantstofly dot org>]

On Tue, Dec 05, 2006 at 07:33:12PM -0800, Michael K. Edwards wrote:

> >> Do you turn on TLS and/or OABI userland compatibility in your kernel
> >> config?
> >
> >What is TLS userland compatibility?
> 
> Sorry, ambiguous phrasing.  I was asking about
>  1) TLS;
>  2) OABI userland compatibility.
> What I really meant to ask about TLS is whether your processor has the
> new CP15 "hard" TLS register

No, it doesn't, it's a vanilla xscale v2 based CPU.


> >Yes, I build kernels with OABI compatibility, as I said above.
> 
> Do you happen to know whether this works properly in 2.6.16.x?
> 2.6.18.x?  2.6.19 with Ingo's preempt/RT patch?

I didn't try until 2.6.19-rc1 or so, but that works fine.  I haven't
tried with any external patches but I don't see why it wouldn't work.


> >> Is this toolchain built with crosstool,
> >
> >Nope.  I made use of the excellent work done by the OpenEmbedded
> >people (and more specifically Koen Kooi) on the EABI Angstrom distro,
> >and from there I natively built binutils/gcc/glibc on the actual
> >target (so the EABI compiler and C library I use on the ARM board
> >were actually compiled on that same ARM board.)
> 
> Have you tried running your native toolchain under qemu?  That's been
> a successful strategy for me in the past, especially since a lot of
> configure scripts don't get cross-compile quite right.

I don't cross compile anything except the kernel.


> >> Does NPTL work for you in this configuration?
> >
> >Yes.
> 
> You wouldn't happen to have benchmarked a thread-intensive load on
> your hardware with and without NPTL, would you?  I would expect the
> gain to be significant from not blowing MMU context on every thread
> switch, but I haven't seen hard numbers on ARM.

Why would LinuxThreads 'blow MMU context on every thread switch'?

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