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Re: redboot[RAM] crashes


> And here I found the mmu table. Of cause it is wrong and has to
> be altered. But my knowledge about the arm assembler is not
> sufficient to understand this instructions:
> 
> mmu_table:
>   //  This page table sets up the preferred mapping:
>   //
>   //  Virtual Address   Physical Address  XCB  Size (MB)  Description
>   //  ---------------   ----------------  ---  ---------  -----------
>   //     0x00000000       0x00000000      010     256     SDRAM (cached)
>   //     0x10000000       0x10000000      010     256     SDRAM (alias)
>   //     0x20000000       0x00000000      000     256     SDRAM (uncached)
>   //     0x48000000       0x48000000      000      64     PCI Data
> [...]
> 
>   // 256MB SDRAM
>   .set    __base,0x000
>   .rept   0x100 - 0x000
>    FL_SECTION_ENTRY __base,0,3,0,0,1,0
>   .set    __base,__base+1
>   .endr
> 
>    // 256MB SDRAM (alias)
>    .rept   0x200 - 0x100
>    FL_SECTION_ENTRY __base,0,3,0,0,1,0
>    .set    __base,__base+1
>    .endr
> 
>   // 256MB SDRAM (uncached)
>   .set    __base,0x000
>   .rept   0x300 - 0x200
>   FL_SECTION_ENTRY __base,0,3,0,0,0,0
>   .set    __base,__base+1
>   .endr
> 
> 
> So could you give me a hint how this stuff works, especially what
> FL_SECTION_ENTRY is used for and why the __base symbol is set to
> zero again and again. (And is __base+1 a new symbol or just the
> arithmetic addition with 1)

FL_SECTION_ENTRY is an assembly langauge macro. It is defined in
hal/arm/xscale/cores/current/include/hal_mm.h. This section of code is
layout out the MMU control tables, or Translation Lookaside Buffers.

I presume the xscale uses the standard ARM layout, so try to get hold
of "ARM Archictecture Refernce Manual" which has a section at the back
about this. The xscale documentation probably also covers this.

Because of your EEPROM you might need a modified layout. What are the
physical addresses of the SDRAM, EEPROM etc. How do they fit to the
table in the code?

        Andrew


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