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Re: STM32F107 on STM3210C-EVAL
On 23.03.2011 11:50, John Dallaway wrote:
> Hi Gian Maria
>
> Gian Maria wrote:
>
>> I'm porting eCos to STM3210C and I find a logical error on the
>> implementation of CYGPKG_HAL_CORTEXM_STM32.
>> CYGPKG_HAL_CORTEXM_STM32 must be the base of all STM32 uP and so is not
>> correct for me to use
>>
>> cdl_option CYGHWR_HAL_CORTEXM_STM32 {
>> display "STM32 variant in use"
>> flavor data
>> default_value {"F103ZE"}
>> legal_values {"F103RC" "F103VC" "F103ZC"
>> "F103RD" "F103VD" "F103ZD"
>> "F103RE" "F103VE" "F103ZE" }
>> description "The STM32 has several variants, the main differences
>> being in the size of on-chip FLASH and SRAM
>> and numbers of some peripherals. This option
>> allows the platform HAL to select the specific
>> microcontroller fitted."
>> }
>>
>> That is inside "ecoscvs\ecos\packages\hal\cortexm\stm32\var\current\cdl",
>> because with my EVB for example
>> the uP is a STM32F107VC. With this I can't set the right uP as default for
>> the template.
>> I'm right? I think the correct is to put the code inside
>> "ecoscvs\ecos\packages\hal\cortexm\stm32\stm3210e_eval\current\cdl"
> I am not sure I understand your question. Are you intending to create a
> new platform HAL package for STM3210C-EVAL?
>
>> Can someone modify this so I can update my CVS and work with the right code?
> It will be no problem to extend the set of legal values for
> CYGHWR_HAL_CORTEXM_STM32. Of course, you can make this change in your
> local CVS checkout until you are ready to contribute your platform
> support for STM3210C-EVAL.
Current STM32 code, as is, would not work for single chip configuration
as it unconditionally depends on external RAM. In SIvA we have an
internal modification that enables single chip operation and if there is
an interest we would post a patch.
Note: Our code is tested on ST STM3210E EVAL, i.e. not tested with
Connectivity line member.
Regards
Ilija