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Re: Strongarm rtc and oscr


Andrea Acquaviva wrote:
> 
> I want to measure eCos multi-threading energy costs. I use it on the
> assabet board.

Have you looked at the tm_basic kernel test?

> In order to measure context switch overhead, I need some infos about
> timeslicing:
> 
> - the option CYGNUM_KERNEL_SCHED_TIMESLICE_TICKS refers to 3.6864MHz
>    clock ticks?

Yes.

> - How does eCos use real time clock (RTC) and operating system timer
> (OSCR) of
>     StrongARM 1110?

An interesting question because we are considering changing the way it
operates right now! The interesting part is in
hal/arm/sa11x0/var/current/src/sa11x0_misc.c and hal_clock_rest() and
hal_clock_read(). Currently it resets it to 0 each interrupt, but we may be
about to change it to make it a freerunning counter.

Jifl
-- 
Red Hat, Rustat House, Clifton Road, Cambridge, UK. Tel: +44 (1223) 271062
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