Re: [ECOS] Mem maps and mmu for iq80310

[Mark Salter <msalter at redhat dot com>]

>>>>> Ashwin Kamath writes:

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> The mlt_arm_iq80310_*.h files probably calculate the Heap sizes
> incorrectly. Probably the caculations are based on the assumption that
> RAM always starts at Address 0??

Yes, I ran across the same problem this week. Here is the patch:

Index: hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_ram.h
===================================================================
RCS file: /home/cvs/ecc/ecc/hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_ram.h,v
retrieving revision 1.1
diff -u -p -5 -r1.1 mlt_arm_iq80310_ram.h
--- hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_ram.h	2000/10/27 04:39:44	1.1
+++ hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_ram.h	2001/03/30 12:52:31
@@ -12,11 +12,10 @@
 #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];
 #endif
 #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
-#define CYGMEM_SECTION_heap1_SIZE (0xf00000 - (size_t) CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0xa2000000 - (size_t) CYG_LABEL_NAME (__heap1))
 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__pci_window) [];
 #endif
-//#define CYGMEM_SECTION_pci_window (CYG_LABEL_NAME (__pci_window))
-//#define CYGMEM_SECTION_pci_window_SIZE (0x100000)
+
Index: hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_rom.h
===================================================================
RCS file: /home/cvs/ecc/ecc/hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_rom.h,v
retrieving revision 1.1
diff -u -p -5 -r1.1 mlt_arm_iq80310_rom.h
--- hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_rom.h	2000/10/27 04:39:44	1.1
+++ hal/arm/iq80310/current/include/pkgconf/mlt_arm_iq80310_rom.h	2001/03/30 12:52:31
@@ -15,11 +15,7 @@
 #define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];
 #endif
 #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
-#define CYGMEM_SECTION_heap1_SIZE (0x1f00000 - (size_t) CYG_LABEL_NAME (__heap1))
-#ifndef __ASSEMBLER__
-extern char CYG_LABEL_NAME (__pci_window) [];
-#endif
-// #define CYGMEM_SECTION_pci_window (CYG_LABEL_NAME (__pci_window))
-// #define CYGMEM_SECTION_pci_window_SIZE (0x100000)
+#define CYGMEM_SECTION_heap1_SIZE (0xa2000000 - (size_t) CYG_LABEL_NAME (__heap1))
+


> I was also wondering why the mmu page tables are being setup so that the
> first 1MB of SDRAM is cached and not buffered, while the rest is cached
> and buffered. I did not see any difference in the way the first 1MB is
> used.

The first 1MB of SDRAM is cached and buffered. There is a comment in the code that
says otherwise, but the comment is wrong.

--Mark