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Re: FIQ on ARM


Gary Thomas wrote:
> 
> On 14-May-2001 Jonathan Larmour wrote:
> > David Airlie wrote:
> >>
> >> Hi all,
> >>
> >> I see eCos supports the FIQ on ARM as just another IRQ line, is there any
> >> way to make it use the FIQ as a prioritised interrupt line? I have an IRQ
> >> interrupt that holds the system for a long time and I'd like to allow a
> >> serial FIQ to interrupt it ... but all eCos does is return if the IRQ is
> >> active an allow eCos to service it ..
> >>
> >> my current thinking is to remove the return .. but I'm wondering how
> >> re-entrant eCos is at this level, will it handle the situation well..
> >
> > For a start, if you do that you'll stomp on __exception_stack. You'll need
> > to make a separate __FIQ_exception_stack. After that it may not be too bad
> > because it shouldn't be terribly different from a nested interrupt. But
> > there could well be fiddly bits with the mode registers.
> 
> Actually, this should already work fine.  Are you working from anonCVS?  We
> made some significant changes in this area at the end of January, 2001.
> 
> I am curious what was meant by the statement "but all eCos does is return if
> the IRQ is active an allow eCos  to service it".  Can you [David] articulate?
> maybe point at the code?

David means this bit:

        // If FIQ interrupted IRQ mode, just return with FIQ disabled.
        // The common interrupt handling takes care of the rest.
        orr     r8,r8,#CPSR_FIQ_DISABLE
        msr     spsr,r8
        subs    pc,lr,#4

I believe this means that the FIQ gets processed after the current IRQ. And
if we already have an IRQ, the FIQ could be interrupting it at any point,
such as when it's using __exception_stack.

Jifl
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