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Re: One more memory mapping question


Cristiano Ligieri Pereira wrote:
> 
> Hi all,
> 
> I'm working on the port of an XScale board. The memory mapping I'm using
> is the following:
> 
> . Physical (from the documentation)
> +----------------------------+-------+--------+--------------------------+
> | 80200 Address Range          Size     Width   Peripheral               |
> +----------------------------+-------+--------+--------------------------+
> | 0xC2000000 - 0xFFFFFFFF    |  -    |  -     | Invalid                  |
> | 0xC0000000 - 0xC1FFFFFF    |  32   |  64    | SDRAM                    |
> | 0x00700000 - 0xBFFFFFFF    |  -    |  -     | Invalid                  |
> | 0x00600000 - 0x006FFFFF    |  1    |  8     | CS3# - (future expansion)|
> | 0x00500000 - 0x005FFFFF    |  1    |  8     | CS2# - Numeric LED       |
> | 0x00400000 - 0x004FFFFF    |  1    |  8     | CS1# - 16C550 UART       |
> | 0x00000000 - 0x003FFFFF    |  4    |  8     | CS0# - Flash             |
> +----------------------------+-------+--------+--------------------------+
> 
> . Logical
> +----------------------------+-------+--------+--------------------------+
> | 80200 Address Range          Size     Width   Peripheral               |
> +----------------------------+-------+--------+--------------------------+
> | 0xC2000000 - 0xFFFFFFFF    |  -    |  -     | Invalid                  |
> | 0xC0400000 - 0xC1FFFFFF    |  28   |  64    | SDRAM                    |
> | 0xC0000000 - 0xC03FFFFF    |  4    |  8     | CS0# - Flash             |
> | 0x00700000 - 0xBFFFFFFF    |  -    |  -     | Invalid                  |
> | 0x00600000 - 0x006FFFFF    |  1    |  8     | CS3# - (future expansion)|
> | 0x00500000 - 0x005FFFFF    |  1    |  8     | CS2# - Numeric LED       |
> | 0x00400000 - 0x004FFFFF    |  1    |  8     | CS1# - 16C550 UART       |
> | 0x00000000 - 0x003FFFFF    |  4    |  64    | SDRAM                    |
> +----------------------------+-------+--------+--------------------------+
> 
> I'm switching the FLASH and SDRAM memory so that I have SDRAM at 0x0 and
> consequently the vectors can be installed in the address 0x0 and no
> drastic changes are needed in the independent source code (like
> vectos.S). I have some questions:
> 
> 1. As you can see I'm mapping 4MB of SDRAM in the first 4MB addresses.
> Then the flash memory at address 0xC0000000 and the rest of SDRAM at the
> address 0xC0400000. I'll be wasting the 28MB of SDRAM memory at address
> 0xC0400000 if I don't tell eCos about it, right? How should I deal with
> this?

Remap the devices at 0x400000 and so on to soewhere else give you space and
map it all in is my first thought. Or tell eCos about it, and leave the
SDRAM in two places.

> 2. Do I need to defined to memory regions in the memory mapping files? How
> should I do that?

With the memory layout tool on windows, or by hacking on the
mlt_<target>_<startup>.ldi and .h files.
 
> 3. Am I doing the right thing broken SDRAM like that?

You won't get an efficient use of memory like that. The linker can assign
sections only to one region or the other. You _can_ make it work with the
split memory though. And there is support in eCos for multiple regions
allocated as heaps (call them heap1, heap2, etc.).

What may in fact be easiest is defining all non-vector sections into the
28Mb region, using the rest as "heap1", and then define the rest of the 4Mb
chunk to be "heap2". This would only be a problem if someone's program was
greater than 28Mb.

The "correct" answer is still to remap all your memory to be contiguous.

Jifl
-- 
Red Hat, Rustat House, Clifton Road, Cambridge, UK. Tel: +44 (1223) 271062
Maybe this world is another planet's Hell -Aldous Huxley || Opinions==mine


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