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Re: interrupt latency (ARM7)


Ilko Iliev wrote:
> 
> I measured IRS latency again - it is 5 - 60 mkSec.
> 5 mkSec is the minimum - there are 55 instructions before the interrupt handler.
> 
> Why are the interrupts so long time disabled?

Various components may disable interrupts. To understand the real-time
behaviour of a configurable system like eCos, you need to understand the
code that is running. In particular, device driver ISRs that will run with
interrupts off. You should analyze where your system is running when it has
interrupts disabled (the Jeeni probably has support for this type of
analysis).

> Why the system disable FIQ too?

eCos does not distinguish between IRQ and FIQ. When someone wants to
disable "interrupts" we can't tell what that means. If you want to do that
type of thing, it's one of the reasons you have the source code!

> Haw can I reduce the ISR latency time?
> I need a interrupt every 100mkSec continuous (unbroken). How I make this?

Maybe. But do remember that eCos is a soft real-time system, not hard
real-time.

Jifl
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