[ECOS] Q about HAL_INTERRUPT_MASK/UNMASK.

[Sergei Organov <osv at javad dot ru>]

Hello,

Is it required by the HAL interface that implementation of HAL_INTERRUPT_MASK
and HAL_INTERRUPT_UNMASK be reentrant?

Consider simple interrupt controller having an interrupt enable register (IER)
where single bit is dedicated for every interrupt source.  Suppose also that
processor doesn't have atomic "set bit"/"clear bit" instructions.
Implementation of mentioned macros for such an architecture wold look like
this:

1. Read IER to a temporary;
2. Set/Clear bit in the temporary;
3. Write temporary back to IER;

Once this sequence is interrupted between (1) and (3) and interrupting code
also invokes one of these macros we are in trouble.

So the question is: is it required to disable/enable processor interrupts at
the beginning/end of these macros when implementing HAL for such architecture?

If no, please teach me what I've missed.

Thanks in advance.

BR,
Sergei Organov.