[ECOS] How can I modify hal_aux.c and another code for memory remapping? ( PowerPC)

["Seung-hun, Lee \(Stanly\)" <seunghun at kaist dot ac dot kr>]

Hello. I'm trying to modify my code to change memory map from MBX860 to my target board.
My target board use MPC850 and another memory map.
My target board is like this:

(Memory Map)
0x0000.0000 - 0x00FF.FFFF : 16MB SDRAM
0xFF00.0000 - 0xFF00.3FFF : MPC8xx On-chip Register
0xFFE0.0000 - 0xFFFF.FFFF : 2MB FLASH

Then, I modified all 6 mlt_* files like this    (I abbreviated mlt_*_*_ram section)

<mlt_powerpc_mytarget_rom.mlt>

version 0
region ram 0 1000000 0 !                            //Change
region rom ffe00000 200000 1 !                    //Change
section reserved_vectors 3000 1 0 0 1 1 1 1 0 0 reserved_vsr_table reserved_vsr_table !
section reserved_vsr_table 200 1 0 0 0 1 0 1 reserved_virtual_table reserved_virtual_table !
section reserved_virtual_table 100 1 0 0 0 1 0 0 data !
section data 0 10 1 1 0 1 0 0 sbss !
section sbss 0 4 0 1 0 1 0 1 bss bss !
section bss 0 10 0 1 0 1 0 1 heap1 heap1 !
section heap1 0 8 0 0 0 0 0 0 !
section vectors 0 1 0 1 1 1 1 1 ffe00000 ffe00000 text text !
section text 0 4 0 1 0 1 0 1 fini fini !
section fini 0 4 0 1 0 1 0 1 rodata1 rodata1 !
section rodata1 0 8 0 1 0 1 0 1 rodata rodata !
section rodata 0 8 0 1 0 1 0 1 fixup fixup !
section fixup 0 4 0 1 0 1 0 1 gcc_except_table gcc_except_table !
section gcc_except_table 0 1 0 1 0 0 0 1 data !                                    

<mlt_powerpc_mytarget_rom.h>

// eCos memory layout - Fri Oct 20 10:35:48 2000

// This is a generated file - do not edit

#ifndef __ASSEMBLER__
#include <cyg/infra/cyg_type.h>
#include <stddef.h>

#endif
#define CYGMEM_REGION_ram (0)
#define CYGMEM_REGION_ram_SIZE (0x1000000)            //Change
#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
#define CYGMEM_REGION_rom (0xffe00000)                    //Change
#define CYGMEM_REGION_rom_SIZE (0x200000)                //Change
#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vectors) [];
#endif
#define CYGMEM_SECTION_reserved_vectors (CYG_LABEL_NAME (__reserved_vectors))
#define CYGMEM_SECTION_reserved_vectors_SIZE (0x3000)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_vsr_table) [];
#endif
#define CYGMEM_SECTION_reserved_vsr_table (CYG_LABEL_NAME (__reserved_vsr_table))
#define CYGMEM_SECTION_reserved_vsr_table_SIZE (0x200)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__reserved_virtual_table) [];
#endif
#define CYGMEM_SECTION_reserved_virtual_table (CYG_LABEL_NAME (__reserved_virtual_table))
#define CYGMEM_SECTION_reserved_virtual_table_SIZE (0x100)
#ifndef __ASSEMBLER__
extern char CYG_LABEL_NAME (__heap1) [];
#endif
#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
#define CYGMEM_SECTION_heap1_SIZE (0x1000000 - (size_t) CYG_LABEL_NAME (__heap1))    //Change

<mlt_powerpc_mytarget_rom.ldi>

// eCos memory layout - Fri Oct 20 10:35:48 2000

// This is a generated file - do not edit

#include <cyg/infra/cyg_type.inc>

MEMORY
{
    ram : ORIGIN = 0, LENGTH = 0x1000000                //Change            
    rom : ORIGIN = 0xffe00000, LENGTH = 0x200000    //Change
}

SECTIONS
{
    SECTIONS_BEGIN
    SECTION_vectors (rom, 0xffe00000, LMA_EQ_VMA)            //Change
    SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
    SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA)
    SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
    CYG_LABEL_DEFN(__reserved_vectors) = 0; . = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000;
    CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
    CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x1); . = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
    SECTION_data (ram, ALIGN (0x10), FOLLOWING (.gcc_except_table))
    SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
    SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
    SECTIONS_END
}

And I changed hal_aux.c. But I don't know about middle section of this code that I attached.


<hal_aux.c>
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
    // Mapping for the Motorola MYTARGET 860 development board
    ///Seunghun 2002.8.13
    ///CYGARC_MEMDESC_CACHE(   0xfe000000, 0x00400000 ), // ROM region
 CYGARC_MEMDESC_CACHE(   0xffe00000, 0x00200000 ), // ROM region
    ///
    
    ///Seunghun 2002.8.13
    ///Don't know how to modify 
    CYGARC_MEMDESC_NOCACHE( 0xff000000, 0x00100000 ), // MCP registers
    CYGARC_MEMDESC_NOCACHE( 0xfa100000, 0x00000004 ), // Control/Status+LEDs
    ///
    
    ///Seunghun 2002.8.13
    ///CYGARC_MEMDESC_CACHE(   0x00000000, 0x00800000 ), // Main memory
 CYGARC_MEMDESC_CACHE(   0x00000000, 0x01000000 ), // Main memory
 ///
    CYGARC_MEMDESC_TABLE_END
};

If you guys know about remapping way, please tell me about how to modify code.

Thank you in advance and have good day!

                                                                                                Seunghun