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FIQ on ARM (ATMEL EB40A)
- From: Serge Manigault <Serge dot Manigault at ask dot fr>
- To: ecos-discuss at sources dot redhat dot com
- Cc: Alain BESSE <alain dot besse at ask dot fr>
- Date: Thu, 05 Sep 2002 14:48:10 +0200
- Subject: [ECOS] FIQ on ARM (ATMEL EB40A)
Hello,
I tried to use the FIQ interrupt like the 3 IRQ on an ATMEL AT91EB40A
target,
with the following modification in ecos packages :
Change made in the hal\arm\at91\current\include\hal_platform_ints.h
--------------------------------------------------------------------
......#define CYGNUM_HAL_INTERRUPT_FIQ 1 // new define
......#define CYGNUM_HAL_ISR_MIN 0 //
instead of 2
Way of initializing the FIQ in our test program :
......PtrConfIt = &(ConfigKeyboard->PtrInterruptInfo[0]);
......cyg_interrupt_configure (CYGNUM_HAL_INTERRUPT_FIQ,
...... CYG_IRQ_CONFIG_EDGE,
...... CYG_IRQ_CONFIG_RISING);
......cyg_drv_interrupt_create (CYGNUM_HAL_INTERRUPT_FIQ,
...... 0, // Priority
...... PtrConfIt->DataHandle, // Data item
passed to interrupt handler
...... PtrConfIt->ISR,
...... PtrConfIt->DSR,
...... &(PtrConfIt->LigneInterruptHandle),
...... &(PtrConfIt->LigneInterrupt));
......cyg_drv_interrupt_attach(PtrConfIt->LigneInterruptHandle);
......cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_FIQ);
In that way the debugger lose control when an FIQ happend,
so we had to modify the hal\arm\arch\current\src\vector.S file like
following,
......FIQ:
...... // We can get here from supervisor mode or from IRQ mode.
...... mrs r8,spsr // CPSR at time of interrupt
...... and r9,r8,#CPSR_MODE_BITS // isolate pre-interrupt mode
...... // if ( (PSR == FIQ) | ( PSR == IRQ) ) then manage the
interrupt
...... // else manage exeption
...... cmp r9,#CPSR_IRQ_MODE
...... beq TrT_IRQ_FIQ
...... // If FIQ interrupted IRQ mode, just return with FIQ disabled.
...... // The common interrupt handling takes care of the rest.
...... cmp r9,#CPSR_FIQ_MODE // does FIQ happened
...... beq TrT_IRQ_FIQ
...... orr r8,r8,#CPSR_FIQ_DISABLE
...... msr spsr,r8
...... subs pc,lr,#4
......TrT_IRQ_FIQ:
...... // If FIQ interrupted supervisor mode, switch to IRQ mode and
...... // fall through to IRQ handler.
...... ldr sp,.__exception_stack // get good stack to save lr and
spsr
...... stmdb sp,{r8,lr}
...... mov r8,#CPSR_IRQ_MODE|CPSR_FIQ_DISABLE|CPSR_IRQ_DISABLE
...... msr cpsr,r8 // switch to IRQ mode
...... ldr sp,.__exception_stack // get regs saved in FIQ mode
...... ldmdb sp,{sp,lr}
...... msr spsr,sp
...... // now it looks like we got an IRQ instead of an FIQ except that
...... // FIQ is disabled so we don't recurse.
......IRQ:
and we never get any ISR/DSR routines called when the FIQ occures
ecos enters in the call_pending_DSRs function and loop back to the FIQ
interrupt.
Does anyone already succeed in implementing the FIQ like an IRQ, or in
another manner?
Is there something wrong in our implementation?
Thanks in advance.
Serge
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