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bug found in SCC interrupts on MPC8XX


Hi All,

I recently wrote a transparent mode serial driver for SCC3 on the A&M
Viper platform.

When I first tested the driver, I did not get any receive interrupts for
SCC3.  I tried connecting to SCC3 through the TDM interface and through
the Non-Multiplexed Serial Interface (NMSI) and could not get a receive
interrupt either way.  I could, however, get a receive interrupt on SCC1
through the TDM interface.

After investigating the problem, I noticed that in the CICR register of
the CPM Interrupt Controller, the SCC priority positions were all
occupied by SCC1 (00).  In the notes for table 35-3 of the MPC860 users
manual, it says "Do not program the same SCC to more than one priority
position".

In my driver, I changed CICR so that the SCC priority positions are
occupied by SCC1, SCC2, SCC3, and SCC4 (i.e. CICR = 00E4E080 : SCCa=00,
SCCb=01, SCCc=10, SCCd=11).  After this change, the SCC3 interrupts
started working correctly.

This bug only affects the use of SCC2-SCC4.

Paul Randall
Delta Information Systems


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