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RE: Interrupt problem ???


Hi Robert,
   First thanks for you help. Here is my final code: For some reason, my ISR
still does get called. I am not too sure about the CYGNUM_HAL_VECTOR_INTERRUPT
but the rest of it should pretty much OK. This define has a value of 5. I am not
too sure what it means. I used the number 40 before because my interrupt was at
address 40 of the vector table.

If you see still anything bizarre, please let me know.

Pascal

/*global*/
cyg_handle_t scc1_handler;
cyg_interrupt intr;
cyg_addrword_t data;

/*done in a thread */
cyg_interrupt_create(CYGNUM_HAL_VECTOR_INTERRUPT,0,data,isr_scc1,dsr_scc1,&scc1_
handler,
&intr);
cyg_interrupt_attach(scc1_handler);
cyg_interrupt_unmask(CYGNUM_HAL_VECTOR_INTERRUPT);
cyg_interrupt_enable();

static cyg_uint32 isr_scc1(cyg_vector_t vector,cyg_addrword_t data)
{
         cyg_interrupt_mask(CYGNUM_HAL_VECTOR_INTERRUPT);
         cyg_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTERRUPT);
         return CYG_ISR_CALL_DSR | CYG_ISR_HANDLED;
}


-----Original Message-----
From: Robert Cragie [mailto:rcc@jennic.com]
Sent: Thursday, October 03, 2002 5:31 AM
To: Cusson, Pascal; ecos-discuss@sources.redhat.com
Subject: RE: [ECOS] Interrupt problem ???


Comments inline.

> -----Original Message-----
> From: ecos-discuss-owner@sources.redhat.com
> [mailto:ecos-discuss-owner@sources.redhat.com]On Behalf Of Cusson,
> Pascal
> Sent: 03 October 2002 00:38
> To: 'ecos-discuss@sources.redhat.com'
> Subject: [ECOS] Interrupt problem ???
>
>
> Hi everyone,
>    I am trying to get an interrupt working on a 8260 powerpc.
> Here is the code I
> am using:
>
>  cyg_handle_t *scc1_handler;
>  cyg_interrupt *intr;

cyg_handle_t scc1_handler;
cyg_interrupt intr;

You need to allocate the space for the data here, not just arbitrary
pointers which point to nothing.
A minor point: 'scc1_handler' is not a very good name, as it implies a
function - 'scc1_handle' would make more sense.

> voif init(){

void init(void){

> /*config SCC! interrupt */
> cyg_interrupt_create(40,0,(cyg_addrword_t)0,isr_scc1,dsr_scc1,scc1
> _handler,intr)
> ;
> cyg_interrupt_attach(*scc1_handler);


cyg_interrupt_create(40,0,(cyg_addrword_t)0,isr_scc1,dsr_scc1,&scc1_handler,
&intr);
cyg_interrupt_attach(scc1_handler);

1) I'm not sure where you get the arbitrary number '40' for the first
parameter - this would usually be a #define which is declared in the HAL,
for example in 'hal_platform_ints.h' for the E7T platform.
2) You pass pointers to the data allocated above, i.e. the addresses of the
data to cyg_interrupt_create()
3) You pass the data as a handle to cyg_interrupt_attach()

> }
>
> /* SCC1 interrupt ISR */
> static cyg_uint32 isr_scc1(cyg_vector_t vector,cyg_addrword_t data)
> {

          cyg_interrupt_mask(vector);

You may want to put this here to stop further interrupts being generated
until you've handled them in the DSR. You'll have to call
cyg_interrupt_unmask() at the end of the DSR. If you don't do this, you have
to take great care when writing the ISR/DSR pair.

>         cyg_interrupt_acknowledge(vector);
>         return CYG_ISR_CALL_DSR | CYG_ISR_HANDLED;
> }

Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT,  UK
http://www.jennic.com  Tel: +44 (0) 114 281 2655

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